GE INTELLIGENT PLATFORMS PPCM1-7457-4E20DBx

Description
Dual 1 GHz PowerPC 7457 6U VME SBC, level 4; 256 MBytes SDRAM per processor, 2 MBytes L3 Cache per processor, 64 MBytes FLASH per processor, 10/100 BASE-T, PPzero Interface, 2 PMC slots, 5 Row P1 & P2, Type B P0
Part Number
PPCM1-7457-4E20DBx
Price
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Manufacturer
GE INTELLIGENT PLATFORMS
Lead Time
Request Quote
Category
Single Board Computers
Specifications
Form Factor
VME
Cache
L2 Cache: 2 x 512 KBytes L3 Cache: 2 x 2 MBytes
EPROM
2 x 32 KBytes
Ethernet
10/100 BASE-T
Features
2 x 64 MBytes FLASH
Memory
2 x 256 MBytes to 512 MBytes SDRAM with EDC
Processor
2 x MPC7457 PowerPC processors up to 1 GHz and beyond
RTC
1 sec. resolution
Serial
COM 1,2
Software Features, Protocols, and RFCs
Full Radstone software support
Timer
8 x 32-bit timer / counters
VMEbus
Tundra Universe IIB
Watchdog Timer
Programmable
Features
- Full product support- Comprehensive software & services
- Full rugged operation- 5 ruggedization levels
- High bandwidth inter-board data- On-board PPzero
- High bandwidth memory- Two Discovery’s with SDRAM
- High bandwidth PMCs- Two 64-bit / 66 MHz PMC sites
- High performance architecture- Two independent processor nodes
- High performance processing- Two 7457 PowerPC processors
Datasheet
Extracted Text
Product Information PPCM1 7457 Dual Processor SBC High performance processing - Two 7457 PowerPC processors High performance architecture - Two independent processor nodes High bandwidth memory - Two Discovery’s with SDRAM High bandwidth PMCs - Two 64-bit / 66 MHz PMC sites High bandwidth inter-board data - On-board PPzero Full rugged operation - 5 ruggedization levels Full product support - Comprehensive software & services PPCM1, the founding member of Radstone’s XtraPower product family, provides dual processing solutions for defense and aerospace applications. Now updated to Freescale 7457 processors, PPCM1 harnesses the processing power of two state-of-the-art Single Board Computers within a single 6U VME slot. The architecture of PPCM1 loosely couples two fully independent processor nodes across a 64-bit PCI bus, providing the system architect with cost effective, high bandwidth processing units. PPCM1’s architecture is also optimized for Real-Time Operating Systems, each node supporting its own entirely standard kernel. For multi-slot processing solutions, PPCM1 provides an opportunity for reducing system slot count, or for dramatically boosting the processing power within each slot. Each of the processing nodes features a Freescale 7457 processor with 512 KBytes on-chip L2 Cache, its own private L3 Cache and high bandwidth access to its own FLASH and SDRAM, plus non-competing access to its own PMC site via a 64-bit/66 MHz PCI bus. Features Processor 2 x MPC7457 PowerPC High performance, low power consumption implementation of 32-bit PowerPC RISC processors up to 1 GHz and architecture with full 128-bit vector processing using AltiVec technology – ideal for beyond mixed high end computing and signal processing applications SPECInt95 = 43.79 @ 1 GHz, SPECfp95 = 31.61 @ 1 GHz SBC Typical Power Consumption when fitted with 7457 & 256 MBytes SDRAM = 32W L3 Cache 2 x 2 MBytes Parity error detection, 64-bit wide at 200 MHz L2 Cache 2 x 512 KBytes On-chip running at core frequency Main Memory bus 2 x 100 MHz Facilitates high data/instruction bandwidth between processors and main memory Main Memory 2 x 256 MBytes to The CPU is interfaced to the main memory via a 64-bit data bus running at 100 512 MBytes SDRAM with MHz. Up to 512 MBytes SDRAM with EDC supported, 256 MBytes being fitted as EDC standard FLASH Memory 2 x 64 MBytes FLASH 64 MBytes per processor fitted as standard, split as follows: 55 MBytes User FLASH, 4 MBytes Boot FLASH, 1 MByte reserved for BIT results etc. 4 MBytes BANC (See below) BANC Boot Area, Non-Corruptible Factory write access only. This contains a firmware monitor that can re-boot the board, should all other loaded programs be corrupted PCI bus to PMC sites 2 x 64-bit 66 MHz Easy incremental system expansion using air or conduction-cooled single or double width PMCs, accommodates very high bandwidth communication or I/O path or custom function PCI bus between nodes 64-bit 33 MHz Provides a high speed inter-node communication path, also using a standard soft- ware interface PPzero on-board 32-bit 33 MHz Provides a performant inter-board communication path, also using a standard soft- ware interface, in addition to VME path EEPROM 2 x 32 KBytes Serial Real-Time Clock 1 sec. resolution The RTC provides TOD/calendar with 1 sec. resolution Ethernet 10/100 BASE-T On CPU0 Serial ports COM 1,2 COM1 for CPU0, COM2 for CPU1 Timers 8 x 32-bit timer / counters Configurable as either timer or counter per CPU Watchdog 2 off Programmable DMA engines 8 available 8 DMA controllers are available in the Discovery ISC for efficiently moving large blocks of data VME Tundra Universe IIB 64-bit VME, 32-bit 33 MHz PCI bus interface, Integral FIFOs, Programmable DMA controller, 70 MBps burst data transfer Software Full Radstone software sup- Radstone’s Deployed test strategy is fully implemented with a combination of BIT port (comprehensive power-up Built-in-Test firmware) and BCS (Background Condition Screening for non-destructive, continuous on-line testing). Also included in Radstone’s COTS software support are BSPs (Board Support Packages) and ESPs (Enhanced Support Packages) for WindRiver’s VxWorks 2 L3 Cache 64 MBytes *Up to *Up to 64 MBytes L3 Cache 2 MBytes FLASH 512 MBytes 512 MBytes TUNDRA FLASH 2 MBytes SDRAM SDRAM Universe II CPU 0 CPU 1 PowerPC PowerPC Discovery Discovery 7457 7457 JTAG Integrated Integrated 64-bit 33 MHz PCI Bus system system Controller Controller JTAG JTAG 64-bit, 66 MHz 64-bit, 66 MHz PCI Bus PCI Bus PCI PMC PMC Bridge Slot 0 Slot 1 To P2 From PMC 1 P0 P2 P1 Figure 1: PPCM1 Functional Block Diagram ( 256 MBytes SDRAM fitted as standard. 512 MBytes can be fitted as a build option). * can support 2 PMC cards. Up to 10 PMCs can be supported PPzero (PCI over PO) in this way by a combination of one PPCM1 and four PPCM1 supports PPzero, a Radstone solution providing for P0CC1s. both high bandwidth peer multi-processing and extension PMCs, using a PCI bus routed over standard P0 capable VME Peer multi-processing – the on-board PCI-PCI bridge can backplanes. also be used to extend the on-board PCI bus to be picked up by further PPCM1s (or any other Radstone PPzero enabled Extension PMCs - PPCM1 includes an on-board PCI-PCI processor boards), facilitating multi-processing over PCI for bridge which can be used to extend the on-board PCI bus maximum system flexibility. through the P0 connector onto a P0 backplane. The PCI bus See the PPzero/P0CC1 data sheets for more details. can then be picked up by P0CC1 carrier cards, each of which Peer Processing via PPZERO High bandwidth access to peer processing across PCI on a P0 backplane - Supported on-board by PPCM1 (and by PPzero adapter cards on any Radstone VMEbus P1 PowerX board) - Genuine Multi-processing, peers see the PCI bus on P0 others main memory VMEbus P2 - Standard O/S backplane driver model supported for VxWorks Access to up to 10 standard PMC cards PPCx P0CC1 P0CC1 PPCM1 PPCM1 within 5 VME slots Easy system expansion at low incremental cost Extension PMC access via PPZERO Figure 2: PPzero Diagram 3 Ethernet Com 1 PPzero Com 2 Input/Output PPCM1 is designed to provide high density rear VME I/O utilizing 5 row VME64 P1 PMC 1 I/O connectors. The Rear I/O tracking is matched for compatibility with all Ethernet, COM1, 2 Radstone’s high data rate PMC1 I/O (Pin > 46) PMCs such as Fibre PMC 0 PPzero P0 I/O Channel and Graphics. Additional matched PMC0 I/O tracking is also provided to take Fibre Channel VME P2 output from PMC1 to the PMC1 I/O center rows of the P0 connector. Type B 95 way P0 connectors are offered as standard. Figure 3: PPCM1 I/O Diagram Ruggedization Levels Radstone uses advanced thermal and mechanical design PPCM1 is available in Radstone’s 5 environmental ruggedization in the printed circuit board, metal work and assembly levels (see Table 1). Air- cooled variants are designed to be used process in order to build in the required levels of in standard industrial VME chassis. Conduction-cooled builds are ruggedness. Ruggedization Level 2 and higher circuit card for use in Radstone or third-party ATR style enclosures. assemblies include Conformal Coating as standard. Ruggedization Level 1 2 3 4 5 Cooling Method Convection Conduction Conformal Coat Optional Standard Standard Standard Low Pressure Operationial 15,000 Ft 15,000 Ft 15,000 Ft 70,000 Ft Low Pressure Storage 50,000 Ft 50,000 Ft 50,000 Ft 70,000 Ft Rapid Decompression - - 0-50,000 Ft 0-70,000 Ft 75°C 85°C High Temp Operationial 55°C@ 65°C@ 75°C@ 300Ft/min 300Ft/min 300Ft/min At card edge Low Temp Operationial 0°C -20°C -40°C -40°C High Temp Storage 85°C 85°C 100°C 100°C Low Temp Storage -40°C -40°C -50°C -50°C Temperature Shock 10°C/min 10°C/min 10°C/min 10°C/min over Ts over Ts over Ts over Ts Humidity 95% non-con- 95% 10 cycles 95% 10 cycles 240hrs 95% 10 cycles 240hrs densing 240hrs Salt Fog - - 5% Salt 48 Hrs 5% Salt 48 Hrs Acceleration 13.5g 13.5g 13.5g 13.5g Vibration Sine 10-500Hz 2g 10-500Hz 2g 5-2000Hz 5g 5-2000Hz 5g 2 z 2 z 2 2 Vibration Random 0.002g H from 0.002g H from 0.04g /Hz with a flat response to 1000Hz. 0.1g /Hz with a flat response to 1000Hz. z z 10-2000H 10-2000H 6dB/Oct roll off from 1000-2000Hz 6dB/Oct roll off from 1000-2000Hz Shock 20g PEAK 20g PEAK 20g PEAK Sawtooth 11mSec duration 20g PEAK Sawtooth 11mSec dura- Sawtooth Sawtooth bench handling tion bench handling 11mSec dura- 11mSec duration tion Table 1: Ruggedization Levels Table 4 Peripheral functions added via use of PMCs are supported Software Model by entirely standard VxWorks drivers, PPCM1 architecture PPCM1 is optimized for running real-time applications does not impose any special memory-map or interrupt based upon non-SMP embedded Operating Systems such needs. Hence PPCM1 is ideally suited to immediate use for as VxWorks. As each PPCM1 processing cell (node) is standard, embedded applications on VxWorks, requiring hardware independent, a fully standard BSP and kernel multiple generic processing elements, or (utilizing the based upon a normal, single-processor memory map can AltiVec processor capabilities), those applications be ported to each. Non-standard porting arrangements, requiring mixed generic processing and DSP activity. typically needed to fit such O/Ss onto an SMP style board, Many third-party packages, e.g. those to support AltiVec are eliminated by the exceptional design of the PPCM1. math’s algorithms, are available for VxWorks, and these There are further advantages to PPCM1 architecture. will run on PPCM1. Any hardware dependencies are Increased memory performance has been mentioned supplied by the Radstone BSP. above, but this is particularly relevant to real-time. Large, Control Communication and Bulk Data complex real-time applications can be subject to high Transfer context switch rates, which on average result in a greater The provision of a standard VxWorks backplane interface reliance upon code in memory rather than in cache. on VME and PPzero, allows all legacy code to operate Typical ‘linear’, non real-time applications do not suffer so unchanged on PPCM1. This includes any use of the much from this. On PPCM1, processors do not compete WindRiver layered multi-processor options like VxMP or for memory through the same bridge, so maximum VxFusion. However, because the WindRiver backplane possible performance is maintained, despite the imposition protocol uses a TCP/IP stack, splitting all traffic down to of real-time context switching. On SMP architecture highly manipulated/verified packets at its lowest level of boards memory competition in the single bridge chip can communication, it has inherently very limited degrade performance in this type of situation. performance. This limit applies to all layered products such as those quoted above that sit above the backplane Standard Task Partitioning – Standard protocol. Radstone’s recommendation is to use the Inter-Node Communications backplane protocol for all control and co-ordination Arrays of PPCM1s can be built up very simply to scale the messages, plus legacy/layered code, where performance is required processing power to application needs. VxWorks not an issue, but to use raw DMA for bulk data transfers tasks are partitioned across multiple nodes exactly as where speed is important. We supply a PCI DMA engine though each node were an independent board. for inter-node and also inter-board traffic on PPzero, and a Communication between nodes and between multiple VME DMA engine too, in our ESP package. The two PPCM1 boards is accomplished in an identical manner, engines share a common interface and allow transfers to proceed at the full rate defined by bus hardware. and complies to industry standard VxWorks methodology. Figure 4: PPCM1 Software Models 5 in slot one, as typically one board in the system is often Legacy Upgrades required to run a variety of interfaces, such as SCSI or PPCM1 is very well suited to the replacement of older, keyboard/mouse, or other control/MMI functions, and single-processor SBCs in legacy multi-processing systems. these may also require unchanged backplane connections. This technology insertion can reduce the slot count, However the other SBCs not using these peripheral increase performance, or both. Figure 5 below depicts a interfaces, and typically present for just processing power typical system constructed from three single processor and memory capacity, are both replaced by PPCM1. SBCs. A VxWorks kernel sits on each board and they all communicate across the VMEbus via the VxWorks The distribution of the application tasks across processing backplane protocol. nodes, and the communication method, both remain exactly the same as in the original system. No re- A replacement system is shown in Figure 6. In addition to arrangement of these is required. In the upgraded system what would be a typical processing power upgrade (to use the backplane protocol may still be run over true VME, or the latest frequency and style of processors), two of the can be configured across PPzero, i.e. PCI over the VME SBCs have been compacted into one unit. Processing backplane on P0. This leaves the VMEbus free for transfers power has been increased, the slot-count reduced, cost to legacy equipment, which can improve overall through- significantly reduced, but the software model remains put, but also determines if slower equipment attached to exactly the same! this bus might impose latency delays on inter-processor traffic. Raw DMA for bulk data transfers can be In this case a single processor ‘workstation’ board (such as accomplished over VME or PPzero. one from Radstone’s PowerX range) has been maintained Figure 5: Legacy Multi-processor implementation Figure 6: Multi-processor implementation with PPCM1 6 Standard Ordering Information Sales Code Description Dual 1 GHz PowerPC 7457 – 256 MBytes SDRAM per processor PPCM1-7457-1E20DBx Dual 1 GHz PowerPC 7457 6U VME SBC, level 1; 256 MBytes SDRAM per processor, 2 MBytes L3 Cache per processor, 64 MBytes FLASH per processor, 10/100 BASE-T, PPzero Interface, 2 PMC slots, 5 Row P1 & P2, Type B P0 PPCM1-7457-2E20DBx Air-cooled level 2 as above with conformal coating PPCM1-7457-3E20DBx Air-cooled level 3 as above with conformal coating PPCM1-7457-4E20DBx Conduction-cooled level 4 as above PPCM1-7457-5E20DBx Conduction-cooled level 5 as above x=software option NOTE: The standard ordering information (above) defines the standard build variant. Consult your local Radstone sales office for availability of further build options.
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