GE Intelligent Platforms ICS-8551 Rugged 4/2-channel, 1.5/3 GHz ADC XMC Module with Virtex-4 FPGA Features The ICS-8551 is a rugged 2 and 4 channel, time-stamping, digital down-conversion, 1.5/3 GHz ADC XMC module intended for filtering and Fast Fourier Transform • 4 AC-Coupled Analog Inputs Software Defined Radio (SDR) applications can be implemented in the FPGA. For • Fs ≤ 1.5 GHz 4-channel, or 3 GHz such as communications and radar in customers not wishing to implement 2-channel (software selectable), 8-bit benign and hostile environments. their own DSP functions, we can provide • Xilinx Virtex-4 User Programmable either off-the-shelf DSP functions or our FPGA (FX60) The combination of high performance FPGA development team can design ADC and FPGA resources allows VHF and and implement specific functions to the • TCXO @ 10 MHz UHF signals to be digitized and processed customer’s specification. • 8-plug Samtec GRF1-J connector directly on the XMC module. Algorithms (Ruggedization Levels 1, 2 and 3) such as digital down conversion, FFT, and The ICS-8551 provides the user with up • 8 Individual MMCX Coaxial Connectors filtering can be developed to execute in the to eight lanes of high-speed serial I/O for (Ruggedization Levels 4 and 5) Virtex-4 FPGA, using the included Hardware communication with XMC equipped carrier • PCI 2.2 64-bit, 66 MHz Master/Target Development Kit (HDK). The module is avail- cards such as the V4DSP at rates up to Burst Mode DMA capable able in five levels of ruggedization, three 3.125 GBytes/s. The 64/66 PCI interface for air-cooled environments and two for provides sustained data rates in excess of • VITA 42 (XMC) high-speed serial interface conduction cooled environments. Details of 400 MBytes/s, while the Pn4 user I/O port (single connector, 8 lanes) the environmental specifications are avail- allows the user to define direct point to • Pn4 LVDS or LVTTL signal levels able from our web site. point connections to the FPGA, eliminating • ANSI/VITA 20-2001 conduction interrupt latencies. The latter two interfaces cooled PMC The ICS-8551 HDK includes a default may be used for applications in which the logic core, designed to provide minimum XMC interface cannot be used. • VxWorks, Linux and Windows occupancy of the FPGA and to provide a software drivers basis for customers to program their own The front panel connectors are an 8-plug functionality. It includes an A/D interface Samtec GRF1-J connector (for ruggediza- and data buffering to the high-speed serial tion levels 1, 2 and 3), or 8 individual MMCX outputs and PCI Bus. Functions such as connectors (for ruggedization levels 4 & 5). ICS-8551 - Rugged 4/2-channel, 1.5/3 GHz ADC PMC/XMC Module with Virtex-4 FPGA Specifications Block Diagram Analog Input • Four AC-coupled analog inputs • 50 Ohm input impedance CH1 • Software selectable full scale input, 0.236 dBm XMC Dual (650 mVpp) or 2.768 dBm (870 mVpp) ADC Rocket • Input signal bandwidth of 2 MHz –700 MHz IO User FPGA CH2 (-3 dB point) Virtex (FX60) • Maximum sample rate of 1.5 GSPS/channel in 4 channel CH3 mode or 3.0 GSPS/channel in 2 channel mode Dual PMC • Minimum sample rate of 200 MSPS P4 ADC XMC user • Internal Sample Clock VCO locked to onboard CH4 connectors IO 10 MHz TCXO or External Source • Analog to digital resolution 8 bits Clock Clock Control Ref. Oscillator • Sampling on rising or falling edge of internal or external sample clock Trigger PCI 2.2 • External Clock LVTTL or Sinewave compatible Interface Sync. 0 dBm min., 20 dBm max. Sample Rate Channel Use 64/66 3 GSPS 1 and 3 only • External Trigger LVTTL User 1.5 GSPS 1,2,3 and 4 • External Sync LVTTL • External User LVTTL • SINAD > 40 dB @ 748 MHz input frequency • SFDR > 45 dB @ 748 MHz input frequency Ordering Information General Specifications ICS-8551A-xOO • IEEE Std. P1386.1-2001 compatible PCI mezzanine card ICS-8551 with Virtex-4 FX60 FPGA • ANSI/VITA 20-2001 conduction-cooled PMC DRV-8551-VXW • VITA 42 XMC compatible (single connector) Software device driver for VxWorks operating system • VxWorks, Linux and Windows software device drivers DRV-8551-LX Onboard Resources Software device driver for Linux operating system • Xilinx Virtex-4 FPGA FX60 DRV-8551-WIN • TCXO @ 10 MHz Software device driver for Windows operating system • 8-plug Samtec GRF1-J connector (Ruggedization DRV-8551-SCA levels 1, 2 and 3) SCA compliant driver • 8 individual MMCX Coaxial connectors (Ruggediza- tion levels 4 and 5) HDK-8551 Hardware Development Kit for FPGA development by user, including default core and dual-channel I/O Specifications programmable DDC core • PCI 2.2 64-bit, 66 MHz master/target burst mode DMA capable • XMC interface, two channels,each with four lanes @ 3.125 GBytes/s VITA 42.0-200x • All 64 user programmable I/O via Pn4 connector routed directly to FPGA • Pn4 user definable LVDS or LVTTL signal levels Environmental • Five build levels available. Air and conduction cooled versions • -40°C to +85°C operating temperature • 95% non-condensing humidity About GE Intelligent Platforms GE Intelligent Platforms, a General Electric Company (NYSE: GE), is an experienced high-performance technology company and a global provider of hardware, software, services, and expertise in automation and embedded computing. We offer a unique foundation of agile, advanced and ultra-reliable technology that provides customers a sustainable advantage in the industries they serve, including energy, water, consumer packaged goods, government and defense, and telecommunications. GE Intelligent Platforms is a worldwide company headquartered in Charlottesville, VA and is part of GE Home and Business Solutions. For more information, visit www.ge-ip.com. GE Intelligent Platforms Contact Information Americas: 1 800 433 2682 or 1 434 978 5100 Global regional phone numbers are listed by location on our web site at www.ge-ip.com/contact www.ge-ip.com/sensorprocessing ©2010 GE Intelligent Platforms, Inc. All rights reserved. All other brands or names are property of their respective holders. Specifications are subject to change without notice. 07.10 GFA-949A