GE Intelligent Platforms ICS-8550 Rugged XMC Module Provides 210 MHz ADCs and Virtex-4 Processing Power Features The ICS-8550 is an XMC form factor digital The DDC core provides for programmable receiver module intended for Software decimation ratios of 1 through 16, with • 2 ADC channels (Analog Devices AD9430): Defined Radio applications such as commu- real or complex outputs. Output selec- 12 bits @ 210 MHz nications and radar in benign and hostile tion options include the high-speed serial • Xilinx Virtex-4 FX60 with two IP cores environments. The card has been optimized outputs or the PCI bus. The 18-bit filter coef- (default logic core, programmable to provide high performance signal conver- ficients can be independently programmed DDC core) sion capability to XMC equipped host cards for each channel; a standard coefficient • Hardware Development Kit (HDK) included such as the V4DSP Dual Virtex-4 & PowerPC set is included in the design. Also provided Processor. The combination of high perfor- are input and output gain controls, a peak • High-speed serial I/O (8 lanes) through mance ADC and FPGA resources allows signal detector and a test signal capability. XMC connector VHF and UHF signals to be digitized and • 8-connector Samtec GRF1-J connector The ICS-8550 provides the user with up processed directly on the XMC module. Algo- (ruggedization levels 1 - 3) to eight lanes of high-speed serial I/O for rithms such as digital down conversion, FFT, • 8 individual MMCX connectors (ruggediza- communication with XMC equipped carrier and filtering can be developed to execute in tion level 4 & 5) cards such as the V4DSP at rates up to 2.5 the Virtex-4 FPGA, using the included Hard- • Companion to V4DSP 6U VME FPGA and GBytes/s. The 64/66 PCI interface provides ware Development Kit (HDK). The module PowerPC Processor sustained data rates in excess of 400 is available in five levels of ruggedization, MBytes/s, while the Pn4 user I/O port allows three for air-cooled environments and two • VxWorks, Linux and Windows device the user to define direct point to point for conduction cooled environments. Details drivers connections to the FPGA, eliminating inter- of the environmental specifications are • Extensive application and technical rupt latencies. The latter two interfaces may available from our web site. support available be used for applications in which the XMC The ICS-8550 HDK includes two core designs, interface cannot be used. a default logic core and a programmable, Optional front panel connectors include dual channel, Digital Down-Converter (DDC) an 8-plug Samtec GRF1-J connector (for IP core. The default logic core, designed to ruggedization levels 1, 2 and 3), or 8 indi- provide minimum occupancy of the FPGA, vidual MMCX connectors (for ruggedization includes an A/D interface and data buff- levels 4 & 5). ering to the high-speed serial outputs and provides a basis for customers to program their own functionality. ICS-8550 Rugged XMC Module Provides 210 MHz ADCs and Virtex-4 Processing Power Specifications Block Diagram Analog Input • 2 analog inputs, transformer-coupled, AD9430, 12-bit • Max. sample rate 210 MHz Flash • 50 Ohm input impedance • Full scale input +7.7dBm or +1.7dBm, software selectable • Input bandwidth 2 – 700 MHz (−3dB) ADC • Max. sampling rate 210 MHz • Internal sampling clock 409.6 MHz VCXO with dividers User FPGA • Min. sampling rate 40 MHz Virtex-4 (FX60) • Ext. clock LVTTL or sine wave 0dBm min., 20dBm ADC max., 10 – 420 MHz • Ext. trigger LVCMOS, rising or falling edge • SINAD >65dB @ fin <70 MHz • SFDR >75dB • Cross-talk <-80dB JTAG Crystal Clock General Specifications Oscillator Control • VITA 42 XMC compliant, 8 lanes Onboard Resources • Xilinx Virtex-4 FPGA XC4VFX60 • Two IP cores available (default core and program- Clock Trigger mable DDC core) • 8-plug Samtec GRF1-J connector (Levels 1 – 3) • 8 individual MMCX connectors (Level 4 & 5) I/O Specifications Ordering Information • PCI 2.2 64-bit, 66 MHz PCI bus interface, universal ICS-8550A-xOO ICS-8550 with Virtex-4 FX60 FPGA signaling • 32 user configurable LVDS I/O pairs directly connect DRV-8550-VXW Software device driver for VxWorks operating system P4 to FPGA DRV-8550-LX Software device driver for Linux operating system Environmental DRV-8550-WIN Software device driver for Windows operating system • Five build levels available. Air and conduction DRV-8550-SCA SCA compliant driver cooled versions HDK-8550 Hardware Development Kit for FPGA development by user, including default core and • -40 to +85 °C operating temperature dual-channel programmable DDC core • 95% non-condensing humidity About GE Intelligent Platforms GE Intelligent Platforms, a General Electric Company (NYSE: GE), is an experienced high-performance technology company and a global provider of hardware, software, services, and expertise in automation and embedded computing. We offer a unique foundation of agile, advanced and ultra-reliable technology that provides customers a sustainable advantage in the industries they serve, including energy, water, consumer packaged goods, government and defense, and telecommunications. GE Intelligent Platforms is a worldwide company headquartered in Charlottesville, VA and is part of GE Home and Business Solutions. For more information, visit www.ge-ip.com. GE Intelligent Platforms Contact Information Americas: 1 800 433 2682 or 1 434 978 5100 Global regional phone numbers are listed by location on our web site at www.ge-ip.com/contact www.ge-ip.com/sensorprocessing ©2010 GE Intelligent Platforms, Inc. All rights reserved. All other brands or names are property of their respective holders. Specifications are subject to change without notice. 07.10 GFA-918A PCI 2.2 Interface 64/66 P4 User I/O XMC: RocketIO PMC/XMC Connectors