VMIVME-9150 IIOC Communications Controller VMEbus Host Communications Link for Multiple Reflective Memory Intelligent I/O Controllers A GE Fanuc Company • Single host communications link controls multiple RM Intelligent I/O Controllers (IIOCs) • Single point fault detection and isolation • Minimizes host overhead — Data buffers may contain points of all I/O types for multiple controllers — Simplifies host data transfers • High-speed host interface using RM or Ethernet • Extensive host software support package • Local I/O exercising support • Slave chassis power down support PHOTO NOT AVAILABLE IIOC COMMUNICATIONS CONTROLLER — The IIOC Communications Controller (IIOC-CC) is a high-performance interface for linking multiple RM IIOCs to a single host computer. An optional standby host is also supported. Either host can drive the IIOC-CC; however, simultaneous operations from both hosts are not supported. The IIOC-CC provides high I/O data rates for very high I/O point count systems by allowing multiple VMIC IIOCs to IIOC SUBSYSTEM CONFIGURATION AND operate independently. The IIOC-CC supports the VMIC REAL-TIME OPERATION — The IIOC-CC supports a VMIVME-9064/32 Reflective Memory-type IIOC. command from the host to select an IIOC subsystem for configuration and initialization. In order to configure a A typical distributed IIOC system utilizing the subsystem, the host first sends the command to select that IIOC-CC is shown in Figure 1. The IIOC-CC communicates IIOC subsystem. The host then downloads configuration data with the IIOC subsystems via VMIC’s high-speed RM. The to the IIOC-CC which then configures the currently selected RM concept provides a very fast and efficient way of IIOC subsystem. After each IIOC subsystem has been sharing data across distributed VMEbus computer systems. configured, a single command may transfer input or output VMIC’s RM interface allows data to be shared between data used by all subsystems. In real-time, the host transfers VMEbus systems (nodes) at rates up to 30 Mbyte/s. Each data to and from the IIOC-CC without regard to the IIOC RM board is configured with on-board SRAM. The local subsystems. SRAM provides fast Read access times to stored data. Writes are stored in local SRAM and broadcast over a high-speed network to other RM nodes. The transfer of data between nodes is software transparent, so no I/O overhead Ordering Options is required. Transmit and Receive FIFOs buffer data during June 23, 2003 800-009150-000 J peak data rates to optimize single board computer (SBC) ABC –D EF and bus performance to maintain high data throughput. VMIVME-9150 – –000 ABC = ® The IIOC-CC includes a Pentium or Motorola 100 = Reserved 200 = Reserved processor based SBC with VMIC firmware and a 21-slot 6U 300 = Reserved chassis assembly. A wide variety of backplanes and power 301 = 25.0 MHz Motorola M162P-242 (68040) 302 = 25.0 MHz Motorola M162PA-252SE (68040) supplies are available to support specific customer 400 = Reserved requirements. Systems can also be configured as shown in 589 = 233 MHz Pentium, 64 Mbyte DRAM On-Board, Ethernet, Fast Ethernet DEF = 000 (Options reserved for future use) Figure 2 to minimize rack space and reduce I/O subsystem Note cost. Option -589 supports only Ethernet and Fast Ethernet host connectivity. For Ordering Information, Call: HOST SOFTWARE SUPPORT PACKAGE — An 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 extensive IIOC-CC Host Software Support Package (HSSP) E-mail: info@vmic.com Web Address: www.vmic.com Copyright © July 1989 by VMIC is available that includes an I/O Point Manager, a Specifications subject to change without notice. Configuration Downloader, a Report Generator Utility, and a set of Real-Time Interface Software Modules. These tools allow the user to configure, document and program the IIOC subsystems via the IIOC-CC in a manner that minimizes errors and facilitates changes. All source code is available to the user to allow maximum programming flexibility. VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 1 VMIVME-9150 A GE Fanuc Company chassis, reconfigure the VMIVME-9064/32, and resume INTELLIGENT I/O CONTROLLER scan operations. The interruption of I/O for the EXERCISER — The IIOC-CC provides the capability to VMIVME-9064/32 subcontroller could be as short as drive the IIOCs from the communications controller (CC) 30 seconds, depending on the amount of time between the without a host computer from simple menu selections. interactions at the VMIVME-9150 control terminal and the The IIOC exerciser feature allows most of the power down operations. functionality of the IIOC to be demonstrated. The IIOC-CC queries each IIOC for I/O boards present and automatically NOTE: Only available when using VMIVME-5550 Reflective configures each IIOC. All channels on all I/O boards are Memory cards. configured with default data conversion types which may be changed by the user. I/O command lists are constructed INTELLIGENT I/O CONTROLLER automatically and the user may select the frame rate in hertz SUBSYSTEM — VMIC’s RM IIOC combines the to perform the real-time I/O. The program can display and intelligence to ease integration and simplify maintenance modify the digital, analog, and synchro output data being with the power to significantly reduce the impact of sent to an IIOC in real-time. Input data received from an real-time I/O on your host computer resources. The IIOC IIOC may also be displayed. All channels on all the boards provides a high-density, high-throughput, low-cost solution are exercised. to the data acquisition and control problem by offloading the I/O scanning, scaling computation, and engineering unit SLAVE IIOC CHASSIS POWER DOWN conversion tasks from host computer computational SUPPORT — The IIOC-CC and VMIVME-9064/32 resources. support an individual chassis maintenance technique that The IIOC subsystem supports a variety of VMIC’s allows the user to remove power from individual remote digital, analog and synchro/resolver I/O boards. Each I/O slave chassis connected to each VMIVME-9064/32 IIOC. board is designed with extensive Built-in-Test capability The following steps provide an overview of the individual and a front panel Fail LED to enable quick fault detection chassis power down scheme. and isolation. The IIOC provides both offline and real-time From the VMIVME-9150 control terminal, through a testing for detecting and isolating failures on these products. menu operation, the user requests that I/O on a specific The processing capabilities of the 32-bit VMIVME-9064/32 subcontroller be suspended so that one microprocessor provides extensive unit conversions for all or more of the subcontroller’s slave chassis may be powered I/O types, and interprets and formats the I/O data in host down. This causes the following actions by the data formats. Digital conversions are provided to represent VMIVME-9150: the VMIVME-9150 stops I/O associated data as bit, byte, word, or longword logicals in host logical with the VMIVME-9064/32 subcontroller, commands the data formats or grouped together in variable width bit fields. VMIVME-9064/32 to purge configuration, causing the Analog data may be represented in raw binary formats VMIVME-9064/32 to be idle. The user is then informed (offset binary and two’s complement) or the host that I/O is suspended so the chassis can now be powered floating-point format for conversions including unipolar and down. bipolar scaling, trigonometric functions, lookup tables, and The chassis is now powered down without affecting the up to third-order polynomial expansions. Synchro/resolver other VMIVME-9064/32 subcontrollers but its I/O is data may be represented as raw offset binary or converted to temporarily suspended. Through another menu selection, the host floating-point format for unipolar and bipolar the VMIVME-9150 is notified by the user that I/O is to be scaling. The ability to configure each I/O point individually resumed, possibly with missing I/O boards. The eases the integration effort by allowing the hardware VMIVME-9150 then performs the following: the interface to change without affecting the host simulation VMIVME-9150 commands the VMIVME-9064/32 to code. Only the affected configuration data file is modified. perform an I/O sizing and enable configuration of missing The IIOC supports an optional user-friendly boards. The VMIVME-9150 commands the CRT-based control panel (ANSI standard terminal) that VMIVME-9064/32 to reconfigure using configuration data allows the Systems Integrator or maintenance technician to saved from previous download. The VMIVME-9150 then monitor all I/O points or to selectively freeze output points resumes the I/O scan operations on the VMIVME-9064/32 during real-time operation. While the system is offline, the subcontroller. user may examine or modify I/O points and initiate and When it is time for the chassis to be powered up again, control diagnostics. The control panel provides for the a similar sequence is performed as above to suspend display of the current status of the system, errors found operations only on one VMIVME-9064/32, power up the during real-time or off-line diagnostics, and the current 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-9150 A GE Fanuc Company system hardware configuration. The control panel facilitates — Global memory maintenance, test, integration, and checkout of the IIOC — Local diagnostic control independent of a host computer system. — Error reporting — Offline and real-time fault detection and The VMIC real-time IIOC subsystem configuration is isolation organized as shown in Figure 3. The central node of the I/O • Diagnostic control subsystem is the IIOC master chassis which is responsible for — Power up initialization all I/O handler communications, CRT control, data format, — Host initiated off-line and real-time subsystem testing, engineering unit — Local terminal control conversions, and communications with the satellite or slave • Failure reporting chassis. System performance requirements will determine the number and type of I/O boards controlled by each IIOC in the — Front panel fail LEDs distributed system. Each IIOC can support up to 11 slave — Local terminal option chassis of 19 I/O boards, each with 32-bit data path VMEbus — Host report repeaters. Typical applications will require only two or three • Real-time firmware chassis including the master chassis for each IIOC — Extensive I/O data conversions subsystem. Long-line repeaters can be provided to allow — I/O data transfers slave chassis to be located up to 2,000 feet from the IIOC. — Real-time fault detection Multidrop bus repeaters are available to reduce cable — Synchro output step limiting requirements and costs. — Analog output step limiting — Analog input smoothing * INTELLIGENT I/O CONTROLLER (IIOC) FIRMWARE TRADEMARKS • Diagnostic firmware The VMIC logo is a registered trademark of VMIC. — Processor Pentium is a registered trademark of Intel Corporation. Other — Local memory registered trademarks are the property of their respective owners. * For a detailed explanation of the performance, features, and operation of the IIOC, refer to the IIOC Family Instruction Manual (VMIC’s Document No. 500-009000-000). VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 3 VMIVME-9150 A GE Fanuc Company I/O BOARD SUPPORT The following VMIC I/O boards are supported: Model No. • Digital I/O boards — 64-bit high-voltage digital input VMIVME-1110* — 64-bit high-voltage and/or differential digital input VMIVME-1111 — 128-bit high-voltage digital input board with Built-in-Test VMIVME-1128 — 128-bit high-voltage filtered digital input VMIVME-1129 — 64-bit optically isolated digital input VMIVME-1150 — 64-bit high-voltage digital output VMIVME-2120 — 128-bit voltage source digital output VMIVME-2127 — 128-bit high-voltage digital output board with Built-in-Test VMIVME-2128 — 64-bit high-current source digital output VMIVME-2130 — 64-bit high-current sink/source digital output VMIVME-2131 — 64-bit digital output relay board with Built-in-Test VMIVME-2210 — 32-channel relay board VMIVME-2232 — 64-bit TTL digital I/O VMIVME-2510B — 128-bit TTL-level digital output VMIVME-2528 (4) — 32-bit high-voltage digital output and 32-bit high-voltage digital input VMIVME-2532A* — 32-bit differential digital output VMIVME-2533 — 32-bit high-voltage digital input and/or output with P2 I/O and Built-in-Test VMIVME-2534 • Analog I/O boards —12-bit ADC (jumper-selectable gain)VMIVME-3100 (1) — High-speed 12-bit ADC with autocal VMIVME-3101 (1) — 12-bit analog-to-digital converter, 48 inputs, and 2 D/A outputs VMIVME-3111 (2) — Scanning 12-bit analog-to-digital converter board with Built-in-Test VMIVME-3113 (2, 3) — High-resolution analog-to-digital converter board VMIVME-3116 (2, 3) — 8-channel, 16-bit resolution analog output board VMIVME-4116 (2) — 32-channel analog output board with Built-in-Test VMIVME-4132 (2) — 16-channel (S&H per channel) analog output board with 16 single-ended analog input multiplexer VMIVME-4500A (2) — 16-channel, 12-bit analog I/O board (AIO) with Built-in-Test on-board VMIVME-4512 (2) — 16-channel scanning analog I/O board with Built-in-Test and P2 I/O VMIVME-4514 (2) • Synchro/resolver boards — Dual-channel digital-to-synchro/resolver VMIVME-4900 — Dual-channel digital-to-synchro/resolver with 5.0 VA option VMIVME-4905 — Quad-channel synchro/resolver-to-digital converter VMIVME-4911 • Serial I/O — Quad-channel serial I/O VMIVME-6015 *The use of 5 ms filters on VMIVME-1110 digital input (DI) boards or on VMIVME-2532A digital input/output (DIO) boards require the use of a delay of 10 ms before DI scanning in the event the I/O service interrupt occurs during DI real-time testing. This delay is necessary to preclude erroneous real-time data because of filter capacitor discharge/charge time. By placing the transfer DI and scan DI commands at the beginning of the frame, the 10 ms may be absorbed by the processing of the other I/O types. VMIC offers a product (VMIVME-1111) which will allow the use of 5 ms filters without any real-time input service delay. A high-density (VMIVME-1128) version is also available. 1. Front panel inputs are not supported. (The VMIVME-3100 and -3101A require the use of VMIVME-4500As for analog input processing.) 2. Compatible with VMIC’s 3V/5V signal conditioning assemblies. This interface capability allows these boards to digitize the following input signals: low-level voltage, AC voltage, thermocouple, RTD, current, frequency, strain gauge, LVDT, and high-level voltage. 3. Front panel inputs are supported. 4. Supported as a 128-bit output board only. 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-9150 A GE Fanuc Company OPTIONAL HOST STANDBY HOST HOST INTERFACE HOST INTERFACE VMIVME-9150 IIOC COMMUNICATIONS CONTROLLER REFLECTIVE MEMORY BUS IIOC 1 IIOC 2 IIOC 15 . . . VMIVME-9064/32 VMIVME-9064/32 VMIVME-9064/32 UP TO 11 SLAVE UP TO 11 SLAVE UP TO 11 SLAVE . . . I/O CHASSIS I/O CHASSIS I/O CHASSIS Figure 1. I/O Subsystem Configuration Based on Communications Controller VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 5 VMIVME-9150 A GE Fanuc Company OPTIONAL STANDBY HOST HOST HOST INTERFACE HOST INTERFACE REFLECTIVE MEMORY (RM) I 9064/32 9 H 9064/32 9064/32 9064/32 V R N WITH 1 O WITH WITH WITH M M T RM 5 S RM RM RM I E . . . 0 T V R M F A E C - E UP TO 11 UP TO 11 UP TO 11 UP TO 11 SLAVE I/O SLAVE I/O SLAVE I/O SLAVE I/O CHASSIS CHASSIS CHASSIS CHASSIS Figure 2. I/O Subsystem Configuration with IIOCs Collocated with the IIOC-CC (VMIVME-9150) 6 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-9150 A GE Fanuc Company OPTIONAL CONTROL PANEL CRT TO REFLECTIVE MEMORY (RM) AT COMMUNICATIONS CONTROLLER I R V MASTER I I I I I I M I M / / / / / / CHASSIS I O O O O O O O C V M E - 5 5 * 0 4 M SLAVE V I I I M CHASSIS / / / I 1 O O O V M E - 5 5 0 4 S SLAVE V I I I MULTIDROP REPEATER LINK** M CHASSIS / / / (VMIVME-5504L SUPPORTS I O 2 O O 8-, 16- AND 32-bit PARALLEL V TRANSFERS) M E - 5 5 0 4 S SLAVE V I I I CHASSIS M / / / I 11 O O O V M E - 5 5 0 4 S *Blank front panel. **Fiber-optic repeater links are available. Figure 3. Intelligent I/O Controller Subsystem Block Diagram Using Multidrop Repeater Link VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 7