VMIVME-5510L-XX VMEbus Multimaster Repeater Link • Multimaster – allows multiple VMEbus masters in all chassis • Software transparent mode – allows direct communication from primary chassis to secondary chassis with no software overhead (unidirectional link control with bidirectional data transfers) • In nontransparent mode, link arbiter determines which VMIVME-5510 is master of the link • In nontransparent mode, single cycle or burst access across the link is selected by software • Memory protected by user-selectable access window • Any address window in one chassis can be mapped to any window in the other chassis (for example, extended supervisory to short nonprivileged) • Window sizes are jumper-selected from 256 bytes to 16 Mbyte (power of two sizes, that is, 256, 512, 1 K, 2 K, etc.) • Compliant to VMEbus Rev. C.1 • Supports 8-, 16-, and 32-bit addressing (bidirectional) • Supports 16-, 24-, and 32-bit addressing (bidirectional) • Program-controlled attention interrupts allow each chassis to interrupt the other chassis • Supports up to 25-foot cables • Allows expansion to multiple VMEbus systems in a star configuration • Switch-controlled isolation for maintenance bidirectional data transfers. Note: This mode allows • Software-controlled isolation only one repeater board to be Master of the link (see • Two boards and two cables (in a variety of cable lengths) form a VME-to-VME link Figure 3). • Automatic detection of remote chassis power up Multiprocessing Mode: With hardware designed to minimize required control software, this mode provides VMEbus MULTIMASTER REPEATER LINK the flexibility to construct elaborate distributed OVERVIEW — The VMIVME-5510 Link is a processor systems and allows the links to be memory high-performance, yet easy-to-use method of linking two or mapped in both directions (see Figure 4). On-board more VMEbus systems together. It is also useful in linking jumpers are available to limit map size and/or provide a wide variety of computer systems based on VMEbus or address translation. Thus, accesses from either chassis designed with VMEbus front ends. to the other can be restricted to user-specified areas. The link consists of two boards and two cables which Both chassis are automatically interlocked only when enable a VMEbus system to be expanded beyond a single the address is within the user-selected window. An chassis. A functional block diagram is provided in Figure 1. arbiter on the primary VMIVME-5510 (primary or Several options and modes of operation are available to secondary is selected by jumpers) determines which enable the user to optimize a variety of system configurations. MODES OF OPERATION Ordering Options June 7, 1999 800-005510-000 E Remote Power Up Detection: Each VMIVME-5510L-XX VMIVME-5510 automatically detects the VMIVME-5510L-xx: Includes two VMIVME-5510 Link boards and cable assemblies presence/absence of the other VMIVME-5510. If one xx feet long VMIVME-5510 is not present, transfers across the link Standard Links: VMIVME-5510L-05 VMIVME-5510L-10 initiated by the local chassis are terminated via a VMIVME-5510L-25 software-selectable BERR or DTACK. The default is For Nonstandard Links, Order: Two VMIVME-5510 Link boards plus two cable BERR. In the case of DTACK, an on-board register assemblies (one shielded and one unshielded) indicates success or failure of a transfer. For a Single Board, Order: VMIVME-5510 Software Transparent Expansion of VMEbus: Connector Data The option is jumper-selectable and expands the Compatible Connector Panduit No. 120-964-435 Panduit No. 100-000-072 VMEbus through an address window. A new base Strain Relief Panduit No. 120-964-053A PC Board Connector address is generated for the secondary chassis. The Note expanded bus is not accessed by the primary bus unless Panduit is also known as ITW/Pancon. the address is within the address window. This method For Ordering Information, Call: allows masters in the primary chassis to operate 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 E-mail: info@vmic.com Web Address: www.vmic.com without the continuous overhead of arbitrating for an Copyright © March 1989 by VMIC expanded bus. This link is software transparent in this Specifications subject to change without notice. mode, that is, it allows for plug-and-play operation with VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 1 VMIVME-5510L-XX CYCLE TIME MEASUREMENTS chassis is granted the link. The arbiter resolves simultaneous access from both chassis by forcing one • Write cycle time (data strobes asserted to data of the chassis to terminate its transfer via BERR or strobes deasserted) averages 1.097 μs DTACK (this is software-selectable). The user can • Read cycle time (data strobes asserted to data select single cycle (default upon power-up/reset) or strobes deasserted) averages 1.584 μs multicycle (burst) access to the link. In SINGLE • Both read and write tests performed in burst mode CYCLE MODE, arbitration is performed every time an using force CPU 29XB, Force RR2 memory address in either chassis falls within that chassis’ board, and 25-foot cables. address window. In MULTICYCLE MODE, one chassis is allowed to perform transfers across the link VMEbus SPECIFICATIONS without interruptions (that is, arbitration is not performed on every cycle). MULTICYCLE MODE is VMEbus Rev. C.1 Compliance: Master/Slave requested by writing to an on-board register. A32/A24/A16 D32/D16/D08/(O)/D08 (EO) UAT Attention Interrupts: VMEbus interrupt signals are isolated (not repeated). Processors in each chassis may PHYSICAL/ENVIRONMENTAL generate an attention interrupt in the other chassis via register access on the VMIVME-5510. Temperature Range: 0 to 55 ˚C, operating -20 to 85 ˚C, storage SPECIFICATIONS Relative Humidity Range: 20 to 80 percent, • Supports 8-, 16-, and 32-bit bidirectional data noncondensing transfers Cooling: Forced convection • Supports 16-, 24-, and 32-bit bidirectional addressing Power Requirements: 5 V 6.24 A maximum at 25 °C • Memory protected by user-selectable access window. When VMEbus access is within window, Connector Data: DIN format it is repeated across the cable. MTBF: 48,640 hours (217F) • Base address and address modifier in repeated chassis are user selectable CABLE DATA • Meets VMEbus specification - Rev. C. (for fully loaded chassis) Quantity: Two each 64-conductor • High threshold logic provides high-noise Type: Flat cable with integral shield (ground plane immunity for all control signals with two drain wires) utilized for address and data (3 M • Simultaneous accesses can be handled three ways: Part No. 3353/64). BERR, interrupt, or status check after transfer(s) Twist-and-Flat (Belden VARI-TWIST) used for • Software isolation control mode for unlinked control signals. operation (multiprocessing) Length: 25 ft maximum • Switch-controlled isolation for maintenance • Bidirectional attention interrupts over the cable TRADEMARKS (level and vector are software selectable) The VMIC logo is a registered trademark of VMIC. • Data strobe latency in burst mode (no VMEbus Other registered trademarks are the property of their arbitration) is typically 731 ns for 25-foot cables respective owners. • Typical DTACK latency for a write is 170 ns (496 ns for read) with 25-foot cables • Allows expansion to multiple backplanes in a star expansion configuration (refer to Figure 2.) • Double Eurocard form factor 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-5510L-XX SHIELDED CABLES TO/FROM OTHER VMIVME-5510 LINK BOARD P4 LOCAL REMOTE DATA DATA DATA DATA 32 32 BUFFERS BUFFERS 32 AM0 TO AM6 A1 TO A31, LWORD ADDRESS LOCAL REMOTE ADDRESS ADDRESS ADDRESS 30 38 BUFFERS 38 DRIVERS ADDRESS WINDOW L LOGIC O C LOCAL REMOTE BASE A ADDRESS ADDRESS ADDRESS 38 DRIVERS L BUFFER V COMMAND AND M ADDRESS STATUS DECODE 21 E LOGIC b OUTGOING ADDRESS IS u DATA BUFFER WITHIN WINDOW CONTROL s BUS MODE P3 DRIVE ADDRESS TO CABLE CONTROL CONTROL LOGIC BUS INTERLOCK CONTROLS LOGIC BUS ATTENTION INTERRUPTS INTERRUPTER MODULE Figure 1. Functional Block Diagram of the VMIVME-5510 Multimaster Repeater Link Board VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 3 ADDRESS DATA VMIVME-5510L-XX CPU MEMORY I/O PRIMARY SECONDARY ...... ADDRESS ADDRESS HUB SPACE SPACE CHASSIS PRIMARY VMEbus INCOMING 5510 5510 5510 ADDRESS WINDOW 5510 5510 OUTGOING ADDRESS WINDOW SECONDARY SECONDARY VMEbus VMEbus CPU MEM I/O CPU MEM I/O Figure 3. Software Transparent Mode 5510 SECONDARY VMEbus CPU MEM I/O Figure 2. Star Configuration PRIMARY SECONDARY ADDRESS ADDRESS SPACE SPACE PRIMARY SECONDARY INCOMING INCOMING WINDOW WINDOW PRIMARY SECONDARY OUTGOING OUTGOING WINDOW WINDOW Figure 4. Multiprocessing Mode 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 DATA ADDRESS ADDRESS DATA