VMIVME-2510B 64-bit TTL Digital I/O with Built-in-Test • The direction of each 8-bit port is individually programmable • 64 mA sink capability • Separate board address decoding for control and data registers • Built-in-Test logic for fault detection and isolation • Fail LED • Compatible with VMIC’s Intelligent I/O Controller product line • High reliability DIN-type I/O connections • 8-, 16-, 32-bit transfers • Optional open-collector outputs FUNCTIONAL CHARACTERISTICS Compatibility: VMEbus speciŢcation compatible double-height form factor I/O Connector Type: Dual 64-pin connector, DIN 41612 I/O Organization: Eight I/O ports; eight bits wide. Model Addressable to any address within short supervisory or No. Description short nonprivileged I/O map. 2510 Original Design - one test mode bit 2510A Two test mode bits (one per connector) Addressing Scheme: Eight ports individually 2510B Recommended for new designs addressable on 8- or 16-bit boundaries. Address DIP (two test mode bits) switches provide unlimited short data I/O address map selection. Built-in-Test: Output data may be read back in real-time or in an off-line mode. The off-line mode is enabled by executing a write to the Control and Status Register (CSR) to set the TEST MODE bits. With the TEST MODE enabled, all outputs are in TRI-STATE. Ordering Options Two TEST MODE bits are provided so that each October 28, 1994 800-000103-000 C ABC – D E F connector I/O (32 bits) can be tested independently if VMIVME-2510B –0– necessary. A = Input/Output Type and Data Polarity 1 = TTL Logic Level Inputs and Outputs, Positive True 2 = TTL Logic Level Inputs and Outputs, Negative True Fail LED: A Fail LED is provided that is illuminated 3 = Open-Collector Outputs (No Inputs), Positive True * 4 = Open-Collector Outputs (No Inputs), Negative True * at power up and system reset. It may be extinguished B = Output Resistor under program control upon a successful diagnostic 0 = No Resistors Installed 1 = 2.2 kW** execution. C = 0 = Not Used I/O Circuit: Transceivers support high current sink (64 Notes mA) outputs. These octal bus transceivers are * 10-pin SIP sockets are provided for user-installed pull-up resistors. Inputs are active once pull-up resistors are installed. SN74AS645 for the logic level TTL I/O option. The ** Must select open-collector Input/Output. open-collector option uses SN74AS641 type Connector Data transceivers. If the open-collector option is ordered, all Compatible Cable Connector Panduit No. 120-964-435E Strain Relief Panduit No. 100-000-032 64 bits are output only. PC Board Header Connector Panduit No. 120-964-033A For Ordering Information, Call: Variations: This product may be purchased in the 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 E-mail: info@vmic.com Web Address: www.vmic.com following variations: Copyright © August 1988 by VMIC Specifications subject to change without notice. VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 1 VMIVME-2510B PHYSICAL/ENVIRONMENTAL IIOC COMPATIBILITY — This product is compatible with VMIC’s family of Intelligent I/O Controllers (IIOCs) Temperature Range: 0 to 55 °C, operating which have applications in the data acquisition, process -20 to 85 °C, storage control, factory automation, and simulation and training markets. IIOC software support for this product is designed Relative Humidity Range: 20 to 80 percent, to support I/O as shown below: noncondensing CONNECTOR Cooling: Convection P3 P4 I I Power Requirements: +5 V at 3.786 A (maximum) O I IO POSITIVE/NEGATIVE TRUE ORDERING O O INFORMATION TTL I/O — This board may be ordered with positive or negative true I/O options. A positive true This concept allows the user to downline load the input option presents a high-level input voltage on each data direction of I/O on each connector; therefore, individual line whose corresponding bit on the VMEbus is a logic one. port control is not supported by the IIOC. IIOC support is A positive true output option presents a logic one to the limited to the VMIVME-2510A or -2510B models. The Output Data Register (ODR) which presents a high-level IIOC is a multiprocessor controller that includes CPU(s), output voltage on each data line. A negative true input global memory(s), a wide variety of optional host computer option presents a high-level input voltage on each data line interfaces and Ţrmware that provides a total turnkey I/O whose corresponding bit on the VMEbus is a logic zero. A solution. More information concerning this product may be negative true output option presents a logic zero to the obtained by requesting the Intelligent I/O Controller Output Data Register which presents a high-level output Instruction Manual, Document No. 500-009016-000. voltage on each data line. TRADEMARKS OPEN-COLLECTOR OUTPUT OPTION — A positive true output option presents a logic one to the ODR The VMIC logo is a registered trademark of VMIC. whose corresponding bit on the VMEbus is a logic one, Other registered trademarks are the property of their which turns the output open-collector transistor ON, respective owners. thereby supplying a ground to the load. A negative true output option presents a logic zero to the ODR whose corresponding bit on the VMEbus is a logic one, which turns the open-collector output transistor OFF. APPLICATION AND CONFIGURATION GUIDES — The following Application and Configuration Guides are available from VMIC to assist the user in the selection, specification, and implementation of systems based on VMIC’s products: Title Document No. Digital Input Board Application Guide 825-000000-000 Change-of-State Board Application Guide 825-000000-002 Digital I/O (with Built-in-Test) Product Line Description 825-000000-003 Synchro/Resolver (Built-in-Test) Subsystem ConŢguration Guide 825-000000-004 Analog I/O Products (with Built-in-Test) ConŢguration Guide 825-000000-005 Connector and I/O Cable Application Guide 825-000000-006 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859 VMIVME-2510B OPTIONAL PULL-UP RESISTORS 16 I/O I/O REG TRANSCEIVERS 64-pin P3 TM2 OUTPUT CONN. 16 VMEbus I/O I/O FOUNDATION REG TRANSCEIVERS LOGIC 16 I/O I/O REG TRANSCEIVERS TM1 64-pin P4 OUTPUT CONN. 16 I/O I/O REG TRANSCEIVERS DATA DATA I/O ADDRESS ADDRESS DIP LOGIC SWITCHES CONTROL AND PORT SELECT STATUS REG CSR CSR ADDRESS FAIL ADDRESS DIP LED LOGIC SWITCHES Figure 1. VMIVME-2510B Functional Block Diagram VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 3 ADDRESS BUS INTERNAL DATA BUS