GE INTELLIGENT PLATFORMS ABI-PCI-2
Specifications
ABI Functionality: Bus Controller (BC)
BC retry
Intermessage gap selectable
Minor frame timing and message scheduling
Multiple BC data buffers in a linked list structure
Programmable delay gaps and null BC blocks
Programmable RT no-response time-out
Customer Support
Driver and library upgrades
Extended warranties available
Over 18 operating systems supported on various platforms
Two-year warranty
Inputs/Outputs
Bi-directional external trigger
External TTL/RS-422 system clock input
IRIG clock input (optional)
Variable voltage 1553 outputs: 0-22 V p-p
Interface Connections
BJ77F Triax connector to 1553 bus
Coupling harness to bus and I/O connectors
DB15F I/O connector
DB44F to coupling harness - Single: - CA-2088 Dual: CA-2087
Map Monitoring
Mapped buffers read by host processor as time permits
Multiple linked buffers for each transmit/receive subaddress
Number of buffers per transmit/receive subaddress is programmable or user defi nable to account for various host speeds
Maximum power consumption (98% bus activity) single channel
5 V @ 1.0 A, 12 V @ 125 mA
Mechanical - dual channel
3/4 Length PCI bus card Length: 9.5” Height: 4.2”
Mechanical - single channel
1/2 length PCI bus card Length: 6.875” Height: 4.2”
PCI Functionality
16-bit and 32-bit transfer modes
50 MB per second maximum transfer rate
On-board firmware storage via Flash memory
PCI bus is 2.1 compliant
Programmable DMA controller
Support for 5 V and 3.3 V PCI bus (dual channel only)
Remote Terminals (RT)
31 RTs and all subaddresses supported
Multiple RT data buffers in a linked list structure
Programmable RT response time and no response selection
Transmit/Receive buffers for each subaddress
Self Test
BIT-RAM and encoder/decoder test
Power-up test with status register report
Run-time health status register
Unit Test application for 1553 bus functionality
Sequential Monitoring
Comprehensive error table readable at any time by host processor
Host driver selected messages are double buffered
Messages time stamped with a 1 µs 32-bit clock or optional 48-bit IRIG-B clock
Standard firmware performs broad error monitoring
Software and Documentation Support
Borland and Microsoft® C Compiler compatible
Hardware and Integrated Avionics Library documentation included on CD. Hard copies of the documentation are available upon request.
Integrated Avionics Library with source code
Low-level drivers for most operating systems
Standard commercial temperature
0°C to +60°C;95% rH non-condensing
Datasheet
Extracted Text
GE Intelligent Platforms (Dual channel version shown) ABI-PCI MIL-STD-1553 Interface ABI-PCI interface provides a flexible, full func- Features Hardware Overview tion, dual redundant MIL-STD-1553 interface to • 1 or 2 dual redundant 1553 channels GE Intelligent Platforms bases the ABI inter- the PCI backplane. This Advanced Bus Interface featuring 100% concurrent and inde- face upon an advanced high speed DSP, (ABI) architecture provides concurrent and pendent operation as a: programmable logic and dual port RAM. It independent operation of a Bus Controller (BC), - Bus Controller delivers a highly reliable hardware platform 31 Remote Terminals (RT), and dual function Bus - 31 Remote Terminals that is feature rich and user friendly. Through Monitoring (BM). The ABI-PCI interface equips - Dual Function Bus Monitor the 128 kB of dual port RAM per channel, the PCI bus system with a complete 1553 inter- • Bus Controller the host processor has access to set up, face. This includes 1553A/1553B selections, monitor, and change the 1553 interface data - Programmable frame lists pointer-driven transmit and receive buffers and - BC-RT, RT-BC, RT-RT structures at any time. Link-list memory extensive programmable event interrupts. - Mode codes, broadcasts, and time delays architecture allows the user to structure interface memory usage for the maximum in • RT Functionality BC simulation structures consist of linked flexibility and usefulness. - RT level protocol selection lists of 1553 command messages: BC-to-RT, - RT definition tables RTto- BC, RT-to-RT, mode code, broadcast and Software Support Overview - Programmable response time time delay block transmissions. We define RT GE distributed software includes host proces- • Bus Monitor simulation as a simple series of pointers to RT sor device drivers to the dual port control - Map monitoring definition tables. The RT definition tables in - Sequential monitoring and data structures as well as an application turn point to control data buffers. We define - Time stamped layer to these structures. GE also provides the bus activity we want to monitor in both - Double buffered lowlevel drivers for most operating systems, the Map and Sequential monitoring modes. - Error tables and the Integrated Avionics Library with This provides user defined linked lists of data - Definable monitoring source code, with the interface at no buffers and sequential 1553 activity. The user additional cost. • Architecture can time stamp and/or double buffer the - On-the-fl y data structures 1553 activity. Both monitoring modes perform - BC and RT linked lists broad error monitoring. They also provide a - High-speed DSP comprehensive error table that the host pro- - Flexible memory structure cessor can read at any time. - Flash memory - Variable voltage 1553 transceivers - Support for 5 V and 3.3 V PCI bus (dual channel only) • Software Support - Complimentary drivers for most operating systems - Integrated Avionics Library, including source code ABI-PCI MIL-STD-1553 Interface Inputs/Outputs • Maximum power consumption (98% bus activity) - Specifications single channel: 5 V @ 1.0 A, 12 V @ 125 mA • Bi-directional external trigger • IRIG clock input (optional) • Maximum power consumption - dual channel: 5 V @ ABI Functionality: Bus Controller (BC) 1.5 A, 12 V @ 250 mA • BC retry • Variable voltage 1553 outputs: 0-22 V p-p • Standard commercial temperature: 0°C to +60°C; • Minor frame timing and message scheduling • External TTL/RS-422 system clock input 95% rH non-condensing • Intermessage gap selectable PCI Functionality • Programmable delay gaps and null BC blocks Software and Documentation Support • PCI bus is 2.1 compliant • Multiple BC data buffers in a linked list structure • Low-level drivers for most operating systems • 50 MB per second maximum transfer rate • Programmable RT no-response timeout • Integrated Avionics Library with source code • 16-bit and 32-bit transfer modes ® • Borland and Microsoft C Compiler compatible Remote Terminals (RTs) • Programmable DMA controller • Hardware and Integrated Avionics Library docu- • 31 RTs and all subaddresses supported • On-board firmware storage via Flash memory mentation included on CD. Hard copies of the • Transmit/Receive buffers for each subaddress • Support for 5 V and 3.3 V PCI bus (dual channel only) documentation are available upon request. • Multiple RT data buffers in a linked list structure Interface Connections • Programmable RT response time and no-response Customer Support • DB44F to coupling harness - Single: CA-2088 selection • Two-year warranty Dual: CA-2087 • Extended warranties available Map Monitoring • Coupling harness to bus and I/O connectors • Driver and library upgrades • DB15F I/O connector • Multiple linked buffers for each transmit/receive • Over 18 operating systems supported on various subaddress • BJ77F Triax connector to 1553 bus platforms • Mapped buffers read by host processor as Interface Card Specifications time permits • Mechanical - single channel: 1/2 length PCI bus card • Number of buffers per transmit/receive subaddress Length: 6.875” Height: 4.2” is programmable or user definable to account for • Mechanical - dual channel: 3/4 Length PCI bus card various host speeds Length: 9.5” Height: 4.2” Sequential Monitoring • Host driver selected messages are double buffered • Messages time stamped with a 1 μs 32-bit clock Configurations • Standard firmware performs broad error monitoring • Comprehensive error table readable at any time by host processor Model Number Configuration Self Test ABI-PCI-1 Single Channel 1553 to PCI interface • Power-up test with status register report • BIT-RAM and encoder/decoder test ABI-PCI-2 Dual Channel 1553 to PCI interface • Run-time health status register • Unit Test application for 1553 bus functionality IRIG IRIG B Time Receiver (add /IRIG to product number) About GE Intelligent Platforms GE Intelligent Platforms, a General Electric Company (NYSE: GE), is an experienced high-performance technology company and a global provider of hardware, software, services, and expertise in automation and embedded computing. We offer a unique foundation of agile, advanced and ultra-reliable technology that provides customers a sustainable advantage in the industries they serve, including energy, water, consumer packaged goods, government and defense, and telecommunications. GE Intelligent Platforms is a worldwide company headquartered in Charlottesville, VA and is part of GE Home and Business Solutions. For more information, visit www.ge-ip.com. GE Intelligent Platforms Contact Information Americas: 1 800 433 2682 or 1 434 978 5100 Global regional phone numbers are listed by location on our web site at www.ge-ip.com/contact www.ge-ip.com ©2010 GE Intelligent Platforms, Inc. All rights reserved. All other brands or names are property of their respective holders. Specifications are subject to change without notice. 01.10 GFA-1370
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