GE INTELLIGENT PLATFORMS ABI-cPCI3U-1
Specifications
ABI Functionality: Bus Controller (BC)
BC retry
Intermessage gap selectable
Minor frame timing and message scheduling
Multiple BC data buffers in a linked list structure
Programmable delay gaps and null BC blocks
Programmable RT no-response time-out
cPCI Functionality
16-bit and 32-bit transfer modes
50 MB per second maximum transfer rate
cPCI bus is PICMG 2.0-D2.13 compliant
I/O mapped to cPCI J2
Memory mapped
On-board firmware storage via Flash memory
Programmable DMA controller
Customer Support
Driver and library upgrades
Extended warranties available
Over 18 operating systems supported on various platforms
Two-year warranty
Inputs/Outputs
Bi-directional external trigger
External TTL/RS-422 system clock input
IRIG clock input (optional)
Variable voltage 1553 outputs: 0-22 V p-p
Interface Connections
BJ77F Triax connector to 1553 bus
Coupling harness to bus and I/O connectors
DB15F I/O connector
DB44F to coupling harness - Single: - CA-2088 Dual: CA-2087
Map Monitoring
Mapped buffers read by host processor as time permits
Multiple linked buffers for each transmit/receive subaddress
Number of buffers per transmit/receive subaddress is programmable or user defi nable to account for various host speeds
Maximum power consumption Single channel
5 V @ 1.0 A, 12 V @ 250 mA
Mechanical - dual channel
Size: Eurocard 6U Length: 6.3" Height: 9.2"
Mechanical - single channel
Size: Eurocard 3U Length: 6.3" Height: 3.9"
Power consumption (98% bus activity) single channel
5 V @ 1.0 A, 12 V @ 125 mA
Power consumption(98% bus activity) dual channel
5 V @ 1.5 A, 12 V @ 250 mA
Remote Terminals (RT)
31 RTs and all subaddresses supported
Multiple RT data buffers in a linked list structure
Programmable RT response time and no response selection
Transmit/Receive buffers for each subaddress
Self Test
BIT-RAM and encoder/decoder test
Power-up test with status register report
Run-time health status register
Unit Test application for 1553 bus functionality
Sequential Monitoring
Comprehensive error table readable at any time by host processor
Host driver selected messages are double buffered
Messages time stamped with a 1 µs 32-bit clock or optional 48-bit IRIG-B clock
Standard firmware performs broad error monitoring
Software and Documentation Support
Borland and Microsoft® C Compiler compatible
Hardware and Integrated Avionics Library documentation included on CD. Hard copies of the documentation are available upon request.
Integrated Avionics Library with source code
Low-level drivers for most operating systems
Standard commercial operating temperature
0° C to +60° C = 95% rH non-condensing
Standard commercial temperature
0°C to +60°C;95% rH non-condensing
Features
- 1 or 2 dual redundant 1553 channels featuring 100% independent operation as one of the following, - Bus Controller, - 31 Remote Terminal, - Dual Function Bus Monitor
- Architecture, - On-the-fly data structures, - BC and RT linked lists, - High-speed DSP, - Flexible memory structure, -Fixed voltage 1553 transceivers
- Bus Controller, - Programmable frame lists, - BC-RT, RT-BC, RT-RT, - Mode codes, broadcasts, and time delays
- Bus Monitor, - Map monitoring, - Sequential monitoring, - Time stamped, - Double buffered, - Error tables, - Definable monitoring
- RT Functionality, - RT level protocol selection, - RT definition tables, - Programmable response time,
- Software Support, - Complimentary drivers for most, operating systems, - Integrated Avionics Library, including, source code
Datasheet
Extracted Text
ABI-cPCI MIL-STD-1553 Interface Features 1 or 2 dual redundant 1553 channels featuring 100% concurrent and independent operation as a: • Bus Controller • 31 Remote Terminals • Dual Function Bus Monitor Bus Controller • Programmable frame lists • BC-RT, RT-BC, RT-RT • Mode codes, broadcasts, and time delays ABI-cPCI interface provides a flexible, full function, dual redundant MIL-STD-1553 interface to the cPCI backplane. This Advanced Bus Interface (ABI) architecture provides concurrent and independent operation of a Bus Controller (BC), 31 Remote Terminals (RT), RT Functionality and dual function Bus Monitoring (BM). The ABI-cPCI interface equips the PCI bus system • RT level protocol selection with a complete 1553 interface. This includes 1553A/1553B selections, pointer-driven • RT definition tables transmit and receive buffers and extensive programmable event interrupts. • Programmable response time BC simulation structures consist of linked lists of 1553 command messages: BC-to-RT, RT- Bus Monitor to-BC, RT-to-RT, mode code, broadcast and time delay block transmissions. We define RT simulation as a simple series of pointers to RT definition tables. The RT definition tables in • Map monitoring turn point to control data buffers. We define the bus activity we want to monitor in both • Sequential monitoring the Map and Sequential monitoring modes. This provides user defined linked lists of data • Time stamped buffers and sequential 1553 activity. The user can time stamp and/or double buffer the • Double buffered 1553 activity. Both monitoring modes perform broad error monitoring. They also provide a • Error tables comprehensive error table that the host processor can read at any time. • Definable monitoring Hardware Overview SBS bases the ABI interface upon an advanced high speed DSP, programmable logic and Architecture dual port RAM. It delivers a highly reliable hardware platform that is feature rich and user • On-the-fly data structures friendly. Through the 128 kB of dual port RAM per channel, the host processor has access • BC and RT linked lists to set up, monitor, and change the 1553 interface data structures at any time. Link-list • High-speed DSP memory architecture allows the user to structure interface memory usage for the maximum • Flexible memory structure in flexibility and usefulness. • Flash memory Software Support Overview • Variable voltage 1553 trans- SBS distributed software includes host processor device drivers to the dual port control and ceivers data structures as well as an application layer to these structures. SBS also provides low- level drivers for most operating systems, and the Integrated Avionics Library with source Software Support code, with the interface at no additional cost. • Complimentary drivers for most operating systems • Integrated Avionics Library, including source code I/O & COMMUNICATIONS ABI-cPCI Configurations Model Number Configuration Specifications Single Channel 1553 to cPCI interface ABI-cPCI3U-1 ABI Functionality: IRIG B Time Receiver (add /I to product number) IRIG Bus Controller (BC) • BC retry ABI-cPCI6U-2 Dual Channel 1553 to cPCI interface • Minor frame timing and mes- sage scheduling • Intermessage gap selectable • Programmable delay gaps and null BC blocks Self Test Interface Card Specifications • Multiple BC data buffers in a linked • Power-up test with status register • Power consumption (98% bus activity) list structure report - single channel: • Programmable RT no-response time- • BIT-RAM and encoder/decoder test 5 V @ 1.0 A, 12 V @ 125 mA out • Run-time health status register • Power consumption - dual channel: • Unit Test application for 1553 bus 5 V @ 1.5 A, 12 V @ 250 mA Remote Terminals (RTs) functionality • Standard commercial operating tem- • 31 RTs and all subaddresses supported perature: • Transmit/Receive buffers for each sub- Inputs/Outputs 0° C to +60° C address • Bi-directional external trigger ≤ 95% rH non-condensing • Multiple RT data buffers in a linked list • IRIG clock input (optional) • Mechanical - single channel: structure • Variable voltage 1553 outputs: 0-22 V Size: Eurocard 3U • Programmable RT response time and p-p Length: 6.3" Height: 3.9" no-response selection • External TTL/RS-422 system clock • Mechanical - dual channel: input Size: Eurocard 6U Map Monitoring Length: 6.3" Height: 9.2" • Multiple linked buffers for each trans- cPCI Functionality mit/receive subaddress • cPCI bus is PICMG 2.0-D2.13 compli- Software and Documentation • Mapped buffers read by host proces- ant Support sor as time permits • 50 MB per second maximum transfer • Low-level drivers for most operating • Number of buffers per rate systems transmit/receive subaddress is pro- • 16-bit and 32-bit transfer modes • Integrated Avionics Library with source grammable or user definable to • Memory mapped code account for various host speeds • Programmable DMA controller • Borland and Microsoft® C Compiler • I/O mapped to cPCI J2 compatible Sequential Monitoring • On-board firmware storage via Flash • Hardware and Integrated Avionics • Host driver selected messages are memory Library documentation included on double buffered CD. Hard copies of the documenta- • Messages time stamped with a 1 µs Interface Connections tion are available upon request. 32-bit clock or optional 48-bit IRIG-B • DB44 to coupling harness - F clock Single: CA-2088 Customer Support • Standard firmware performs broad • Coupling harness to bus and I/O con- • Two-year warranty error monitoring nectors • Extended warranties available • Comprehensive error table readable at • DB15 I/O connector • Driver and library upgrades F any time by host processor • BJ77 Triax connector to 1553 bus • Over 18 operating systems supported F on various platforms Corporate Headquarters European Headquarters 7401 Snaproll NE Memminger Str. 14 Albuquerque, NM 87109 D-86159 Augsburg, Germany Tel 505-875-0600 Fax 505-875-0400 Tel +49-821-5034-0 Fax +49-821-5034-119 Email info@sbs.com Email sales@sbs-europe.com For additional contact information, please visit our web site at www.sbs.com Specifications subject to change without notice. All trademarks and logos are property of their respective owners. ©2005 SBS Technologies, Inc. ABQ20050613
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