VERSALOGIC EPM-15

Reference Manual DOC. REV. 11/30/2010 EPM-15 (Manx) AMD LX Based SBC with Ethernet, Video, and PC/104- Plus interface WWW.VERSALOGIC.COM 12100 SW Tualatin Road Tualatin, OR 97062-7341 (503) 747-2261 Fax (971) 224-4708 Copyright © 2013 VersaLogic Corp. All rights reserved. Notice: Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. VersaLogic reserves the right to revise this product and associated documentation at any time without obligation to notify anyone of such changes. PC/104 and the PC/104 logo are trademarks of the PC/104 Consortium. EPM-15 Reference Manual ii Product Release Notes Rev 5 Release – The power connector (J9) was moved slightly to match the position of the power connector on the VL-EPM-5 (see page 18). Rev 4 Release – New audio codec and Ethernet chips incorporated as a result of component obsolescence. Rev 3 Release – Commercial release. Rev 2 Release – Beta release. Rev 1 Release – Pre-production only. No customer releases. Support Page The EPM-15 support page, at http://www.versalogic.com/private/manxsupport.asp, contains additional information and resources for this product including: ƒ Reference Manual (PDF format) ƒ Operating system information and software drivers ƒ Data sheets and manufacturers’ links for chips used in this product ƒ BIOS information and upgrades ƒ Utility routines and benchmark software Note: This is a private page for EPM-15 users that can be accessed only be entering this address directly. It cannot be reached from the VersaLogic homepage. EPM-15 Reference manual iii Contents Introduction .....................................................................................................................1 Description.......................................................................................................................... 1 Features and Construction ..................................................................................... 1 Technical Specifications ..................................................................................................... 2 EPM-15 Block Diagrams.................................................................................................... 3 RoHS Compliance .............................................................................................................. 5 About RoHS........................................................................................................... 5 Warnings............................................................................................................................. 5 Electrostatic Discharge .......................................................................................... 5 Lithium Battery...................................................................................................... 5 Handling Care........................................................................................................ 6 Technical Support............................................................................................................... 7 Repair Service........................................................................................................ 7 Configuration and Setup ................................................................................................8 Initial Configuration ........................................................................................................... 8 Basic Setup ......................................................................................................................... 8 CMOS Setup..................................................................................................................... 11 Operating System Installation........................................................................................... 12 Physical Details.............................................................................................................13 Dimensions ....................................................................................................................... 13 EPM-15 Dimensions and Mounting Holes.......................................................... 13 CBR-5010 Dimensions and Mounting Holes ...................................................... 14 Hardware Assembly............................................................................................. 15 Stack Arrangement Example ............................................................................... 15 EPM-15 External Connectors ........................................................................................... 16 EPM-15 Connector Locations – Bottom.............................................................. 17 EPM-15 Connector Functions and Interface Cables............................................ 18 Breakout Board Connectors.............................................................................................. 19 CBR-5010 Connector Locations.......................................................................... 19 CBR-5010 Connector Functions and Mating Connectors ................................... 19 Jumper Blocks................................................................................................................... 20 Jumpers As-Shipped Configuration..................................................................... 20 Jumper Summary ................................................................................................. 21 System Features ...........................................................................................................22 Power Supply.................................................................................................................... 22 Power Connectors................................................................................................ 22 Power Requirements ............................................................................................ 23 Lithium Battery.................................................................................................... 23 CPU................................................................................................................................... 23 System RAM..................................................................................................................... 23 CMOS RAM..................................................................................................................... 23 EPM-15 Reference Manual iv Contents Clearing CMOS RAM ......................................................................................... 23 CMOS Setup Defaults ...................................................................................................... 24 Default CMOS RAM Setup Values..................................................................... 24 Real Time Clock ............................................................................................................... 24 Setting the Clock.................................................................................................. 24 ACPI Power Management ................................................................................................ 25 The S3 Sleeping State.......................................................................................... 25 Setup .................................................................................................................... 25 Entering Standby Mode ....................................................................................... 25 Wakeup ................................................................................................................ 26 Interfaces and Connectors...........................................................................................27 Serial Ports........................................................................................................................ 27 COM Port Configuration ..................................................................................... 27 COM3 and COM4 RS-485 Mode Line Driver Control ....................................... 27 IDE Hard Drive / CD-ROM Interfaces............................................................................. 28 J8 Utility Connector.......................................................................................................... 29 USB Interface ...................................................................................................... 30 Programmable LED ............................................................................................. 30 IDE LED.............................................................................................................. 30 Internal Speaker ................................................................................................... 30 Push-Button Reset................................................................................................ 30 Parallel Port....................................................................................................................... 31 Video Interface ................................................................................................................. 32 Configuration....................................................................................................... 32 Video BIOS Selection.......................................................................................... 32 SVGA Output Connector..................................................................................... 32 LVDS Flat Panel Display Connector................................................................... 33 Compatible LVDS Panel Displays....................................................................... 34 Console Redirection............................................................................................. 34 Ethernet Interface.............................................................................................................. 36 BIOS Configuration............................................................................................. 36 Status LED........................................................................................................... 36 Ethernet Connector .............................................................................................. 36 Audio ................................................................................................................................ 37 Software Configuration........................................................................................ 37 CPU Temperature Monitor ............................................................................................... 37 PC/104 Expansion Bus ..................................................................................................... 38 PC/104 I/O Support ............................................................................................. 38 PC/104 Memory Support..................................................................................... 38 IRQ Support......................................................................................................... 38 DMA Support ...................................................................................................... 38 System Resources and Maps.......................................................................................39 Memory Map .................................................................................................................... 39 I/O Map............................................................................................................................. 39 Interrupt Configuration..................................................................................................... 40 Special Registers ..........................................................................................................41 Special Control Register ................................................................................................... 41 Revision Indicator Register............................................................................................... 42 EPM-15 Reference manual v Contents Jumper and Status Register............................................................................................... 43 RS-485/422 Transmit/Receive Control Register .............................................................. 44 Appendix A – References.............................................................................................45 Appendix B – Generated Frequencies ........................................................................46 EPM-15 Reference Manual vi 1 1 Introduction Description FEATURES AND CONSTRUCTION The EPM-15 is a feature-packed single board computer (SBC) designed for OEM control projects requiring fast processing and designed-in reliability and longevity (product lifespan). Its features include: ƒ AMD LX microcontroller ƒ Parallel port ƒ 256 MB soldered on system DDR ƒ Audio SDRAM ƒ CPU temperature sensor ƒ CompactFlash site ƒ One RS-232 COM port and two ƒ 10/100 Ethernet interface RS422/485 COM ports ƒ Flat Panel Display support ƒ VCC sensing reset circuit ƒ PC/104 (ISA) and PC/104-Plus (PCI) ƒ Field upgradeable BIOS with OEM expansion enhancements ƒ ATA-5 IDE controller ƒ ACPI standby mode (suspend to RAM) ƒ Four USB 2.0 ports for keyboard, ƒ Customizing available mouse, floppy, and other devices ƒ Low-power fanless version ƒ TVS devices for ESD protection The EPM-15 is a PC/104-Plus-compliant single board computer with an AMD LX processor. The board is compatible with popular operating systems such as Windows, QNX, VxWorks and Linux. The EPM-15 features high reliability design and construction, including friction latching I/O connectors, voltage sensing reset circuits, and self-resetting fuses on the 5V supply to the USB ports. EPM-15 boards are subjected to 100% functional testing and are backed by a limited two-year warranty. Careful parts sourcing and US-based technical support ensure the highest possible quality, reliability, service and product longevity for this exceptional SBC. A full complement of standard I/O ports is included on the board. Additional I/O expansion is available through the high-speed PC/104-Plus (PCI) and PC/104 (ISA) connectors. The EPM-15 is equipped with a multifunction utility cable, CBR-5010 (breakout board), that provides standard I/O interfaces, including three COM ports, four USB ports, two LEDs, and a pushbutton reset, among others. EPM-15 Reference Manual 1 Introduction Technical Specifications Specifications are typical at 25°C with 5.0V supply unless otherwise noted. Specifications are subject to change without notification. Board Size: 3.55” x 3.775” (PC/104 standard) with 0.20” Compact Flash: connector overhangs in designated connector areas Shares IDE channel, master or slave Storage Temperature: -40° C to 85° C Ethernet Interface: EPM-15g, h -- Intel 82551ER based 10BaseT / Operating Temperature: 100BaseTX Fast Ethernet Controller EPM-15g, S – 0° C to +60° C free air, no airflow, EPM-15S, E -- Intel 82541ER based 10BaseT / standard version 100BaseTX Ethernet Controller EPM-15h, E – -40° C to +85° C free air, COM1 Interface: extended temperature version RS-232, 16C550 compatible, 115 kbps max. Power Requirements: (with 256 MB soldered on COM3–4 Interface: system DDR SDRAM, keyboard and mouse, Running Windows XP) RS-422/485, 16C550 compatible, 460 kbps max. 5V ± 5% @ 1.0 A (5.0 W) typ. LPT Interface: +3.3V or ± 12V may be required by some Bi-directional/EPP/ECP compatible expansion modules BIOS: System Reset: General Software Embedded BIOS© 2000 with 3.3V sensing, resets below 2.94V typ. cc OEM enhancements DRAM: Field-upgradeable with Flash BIOS Update Utility 256 to 512 MB soldered-on DDR SDRAM Bus Speed: Video Interface: PC/104-Plus (PCI): 33MHz Up to 1280 x 1024 (24 bits) PC/104 (ISA): 8MHz Standard RGB analog output (VESA DDC not Compatibility: supported) PC/104 – Partial compliance (See PC/104 LVDS output for TFT FPDs expansion bus) IDE Interface: Embedded-PCI (PC/104-Plus) – full compliance, One-channel, 44-pin, 2mm connector. Supports 3.3V signaling up to and including ATA 100. Weight: Supports two Parallel ATA IDE devices (hard 0.254 lbs (0.115 kg) drive, CD-ROM, CF, etc.) EPM-15 Reference Manual 2 Introduction EPM-15 Block Diagrams DDR SDRAM Address, Data, Control Analog RGB AMD LX FP LVDS National SDCLKS CPU Digital RGB DS90C383A FS2 JTAG Pads System Clocking (MK1491-09) 14.318 MHz Intel 33 MHz 24.576 MHz 10/100M Audio 25.000 MHz AMD USB 2.0 IDE CS5536 (4 Ports) I/O Companion 48.000 MHz RS-485/422 CompactFlash (2 Ports) Connector 32.768 MHz BIOS CPLD ISA Bridge RS-232 ACPI Disable PWRBTN# (SOFT SMSC PWR BUTTON) PWR Control LPC47N217 Super I/O PCI Arbitration ACPI DISABLE JUMPER Figure 1. System Block Diagram EPM-15 Reference Manual 3 I/O Connector Connector Series Terms System Control PCI, 3.3V Series Terms ISA Connector PCI Connector Introduction 5.0V SUSPEND TO RAM POWER 1.2V_SB @ 1 mA TPS79912 CS5536 Standby 3.3V_SB @ 3 mA TPS79933 CS5536 & CPLD Standby 2.5V_SB @ 1.5A LTC3412 CS5536 Standby RESISTOR DIVIDER DDR VTT/REF SYSTEM POWER ON RESISTOR DIVIDER DDR VTT/REF2 2.5V @ 1A Si233DS MOSFET CPU VMEM 1.5V @ 2.3A LTC3412 CPU VCORE 1.2V @ 200 mA LTC3025 CS5536 VCORE 3.3V @ 1.4A LTC3412 CPU and CS5536 VIO I809 POR TO CS5536 EIRQ1_3V (EXTERNAL WAKE) PWR CONTROL PWRBTN# (SOFT PWR BUTTON) WORK_AUX Figure 2. Power Control Block Diagram EPM-15 Reference Manual 4 EN PWR EN PWR# Introduction RoHS Compliance The EPM-15 is RoHS-compliant. ABOUT ROHS In 2003, the European Union issued Directive 2002/95/EC regarding the Restriction of the use of certain Hazardous Substances (RoHS) in electrical and electronic equipment. The RoHS directive requires producers of electrical and electronic equipment to reduce to acceptable levels the presence of six environmentally sensitive substances: lead, mercury, cadmium, hexavalent chromium, and the presence of polybrominated biphenyls (PBB) and polybrominated diphenyl ethers (PBDE) flame retardants, in certain electrical and electronic products sold in the European Union (EU) beginning July 1, 2006. VersaLogic Corporation is committed to supporting customers with high-quality products and services meeting the European Union’s RoHS directive. Warnings ELECTROSTATIC DISCHARGE Warning! Electrostatic discharge (ESD) can damage circuit boards, disk drives and other components. The circuit board must only be handled at an ESD workstation. If an approved station is not available, some measure of protection can be provided by wearing a grounded antistatic wrist strap. Keep all plastic away from the board, and do not slide the board over any surface. After removing the board from its protective wrapper, place the board on a grounded, static-free surface, component side up. Use an antistatic foam pad if available. The board should also be protected inside a closed metallic anti-static envelope during shipment or storage. Note: The exterior coating on some metallic antistatic bags is sufficiently conductive to cause excessive battery drain if the bag comes in contact with the bottom-side of the EPM-15. LITHIUM BATTERY Warning! To prevent shorting, premature failure or damage to the lithium battery, do not place the board on a conductive surface such as metal, black conductive foam or the outside surface of a metalized ESD protective pouch. The lithium battery may explode if mistreated. Do not recharge, disassemble or dispose of in fire. Dispose of used batteries promptly and in an environmentally suitable manner. EPM-15 Reference Manual 5 Introduction HANDLING CARE Warning! Care must be taken when handling the board not to touch the exposed circuitry with your fingers. Though it will not damage the circuitry, it is possible that small amounts of oil or perspiration on the skin could have enough conductivity to cause the contents of CMOS RAM to become corrupted through careless handling (such as when changing the CompactFlash module), resulting in CMOS resetting to factory defaults. EPM-15 Reference Manual 6 Introduction Technical Support If you are unable to solve a problem after reading this manual please visit the EPM-15 Product Support web page shown below. If you have further questions, contact VersaLogic technical support at (541) 485-8575. VersaLogic technical support engineers are also available via e-mail at Support@VersaLogic.com. EPM-15 Support Website http://www.versalogic.com/private/manxsupport.asp REPAIR SERVICE If your product requires service, you must obtain a Returned Material Authorization (RMA) number by calling (541) 485-8575. Please provide the following information: ƒ Your name, the name of your company, your phone number, and e-mail address ƒ The name of a technician or engineer that can be contacted if any questions arise ƒ Quantity of items being returned ƒ The model and serial number (barcode) of each item ƒ A detailed description of the problem ƒ Steps you have taken to resolve or recreate the problem ƒ The return shipping address Warranty Repair All parts and labor charges are covered, including return shipping charges for UPS Ground delivery to United States addresses. Non-warranty Repair All non-warranty repairs are subject to diagnosis and labor charges, parts charges and return shipping fees. Please specify the shipping method you prefer and provide a purchase order number for invoicing the repair. Note: Please mark the RMA number clearly on the outside of the box before returning. EPM-15 Reference Manual 7 2 2 Configuration and Setup Initial Configuration The following components are recommended for a typical development system. ƒ EPM-15 Computer ƒ ATX Power Supply ƒ SVGA Video Monitor ƒ Standard I/O Utility Cable (CBR-5010) ƒ USB Keyboard ƒ USB Floppy Disk Drive ƒ IDE Hard Drive (optional) ƒ IDE CD ROM Drive (optional) The following VersaLogic cables are recommended. ƒ CBR-1201 – Video adapter cable ƒ CBR-5010 – Utility I/O cable (CBR-5009A) and breakout board (CBR-5010B) ƒ CBR-4406 – IDE data cable ƒ CBR-4405 – IDE adapter board, if you are using drives with 40-pin connectors ƒ CBR-1008 – Power adapter cable You will also need a Windows (or other OS) installation CD. Basic Setup The following steps outline the procedure for setting up a typical development system. The EPM- 15 should be handled at an ESD workstation or while wearing a grounded antistatic wrist strap. Before you begin, unpack the EPM-15 and accessories. Verify that you received all the items you ordered. Inspect the system visually for any damaged that may have occurred in shipping. Contact Support@VersaLogic.com immediately if any items are damaged or missing. Gather all the peripheral devices you plan to attach to the EPM-15 and their interface and power cables. It is recommended that you attach standoffs to the board (see Hardware Assembly) to stabilize the board and make it easier to work with. Figure 3 shows a typical start-up configuration (using RoHS compatible cables). EPM-15 Reference Manual 8 Configuration and Setup USB Keyboard and USB Mouse Analog SVGA EPM-15 “Manx” CBR –5009A J1 J7 J8 J4 J1 CBR–1201 CBR –5010B J9 CBR–4406 CBR–1008 Hard Drive ATX Power Supply CD-ROM OS Installation Drive CD-ROM Power to Drives Figure 3. EPM-15 Typical Start-up Configuration 1. Attach Power ƒ Plug the power adapter cable CBR-1008 into socket J9. Attach the motherboard connector of the ATX power supply to the adapter. 2. Attach Cables and Peripherals ƒ Plug the video adapter cable CBR-1201 into socket J1. Attach the video monitor interface cable to the video adapter. ƒ Plug the breakout cable CBR-5009A into socket J8. If necessary, attach the breakout board CBR-5010B to the cable. (The cable and board are shipped attached.) ƒ Plug a USB keyboard and USB floppy drive into socket J4 of the breakout board. ƒ Plug the hard drive data cable CBR-4406 into socket J7. Attach a hard drive and CD- ROM drive to the connectors on the cable. If the hard drive is 3.5”, use the 2mm to 0.1” adapter CBR-4405 to attach the IDE cable. ƒ Attach an ATX power cable to any 3.5” drive (hard drive or CD-ROM drive). ƒ Set the hard drive jumper for master device operation and the CD-ROM drive jumper for slave device operation. EPM-15 Reference Manual 9 Configuration and Setup 3. Review Configuration ƒ Before you power up the system, double check all the connections. Make sure all cables are oriented correctly and that adequate power will be supplied to the EPM-15 and peripheral devices. 4. Power On ƒ Turn on the ATX power supply and the video monitor. If the system is correctly configured, a video signal should be present. 5. Change CMOS Setup Settings ƒ Enter CMOS Setup by pressing Delete during the early boot cycle. ƒ Select Basic Configuration and set or verify the following settings: DRIVE ASSIGNMENT ORDER | Drive C: Ide 0/Pri Master ATA DRV ASSIGNMENT | Ide 0: 3 = AUTOCONFIG, LBA ATA DRV ASSIGNMENT | Ide 1: 5 = IDE CDROM BOOT ORDER | Boot 1st: CDROM BOOT ORDER | Boot 2nd: Drive C: ƒ Before saving the CMOS Setup settings, insert the Windows (or other OS) installation disk in the CD-ROM drive so it will be accessed when the system reboots. ƒ Press ESC and select the option to save the new parameters to CMOS RAM. The system will reboot. 6. Install Operating System ƒ Install the operating system according to the instructions provided by the OS manufacturer. (See Operating System Installation.) Note: If you intend to operate the EPM-15 under Windows XP or Windows XP Embedded, be sure to use Service Pack 2 (SP2) for full support of the latest CS5536 I/O hub and its USB 2.0 features. EPM-15 Reference Manual 10 Configuration and Setup CMOS Setup The default CMOS Setup parameters for the EPM-15 are shown below. Basic CMOS Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Basic CMOS Configuration | | (C) 2005 General Software, Inc. All rights reserved | +---------------------------+--------------------+-----------------------------+ | DRIVE ASSIGNMENT ORDER: | Date:>Apr 09, 2009 | Typematic Delay : 250 ms | | Drive A: (None) | Time: 00 : 00 : 00 | Typematic Rate : 30 cps | | Drive B: (None) | NumLock: Disabled | Seek at Boot : None | | Drive C: Ide 0/Pri Master +--------------------+ Show "Hit Del" : Enabled | | Drive D: (None) | BOOT ORDER: | Config Box : Enabled | | Drive E: (None) | Boot 1st: Drive C: | F1 Error Wait : Enabled | | Drive F: (None) | Boot 2nd: (None) | Parity Checking : (Unused) | | Drive G: (None) | Boot 3rd: (None) | Memory Test Tick : Enabled | | Drive H: (None) | Boot 4th: (None) | Debug Breakpoints: (Unused) | | Drive I: (None) | Boot 5th: (None) | Debugger Hex Case: Upper | | Drive J: (None) | Boot 6th: (None) | Memory Test : StdLo FastHi | | Drive K: (None) +--------------------+-----------------+-----------+ | Boot Method: Boot Sector | ATA DRV ASSIGNMENT: Sect Hds Cyls | Memory | +---------------------------+ Ide 0: 3 = AUTOCONFIG, LBA | Base: | | FLOPPY DRIVE TYPES: | Ide 1: 3 = AUTOCONFIG, LBA | 632KB | | Floppy 0: Not installed | Ide 2: Not installed | Ext: | | Floppy 1: Not installed | Ide 3: Not installed | 219MB | +---------------------------+--------------------------------------+-----------+ Features Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Features Configuration | | (C) 2005 General Software, Inc. All rights reserved | +---------------------------------------+--------------------------------------+ | ACPI 1.0 :>Enabled | System Management Mode : Enabled | | POST Memory Manager : Disabled | Splash Screen : Disabled | | System Management BIOS : Enabled | Primary IDE UDMA : Enabled | | Console Redirection : Auto | Firmbase Debug Console : None | | UsbMassStorage : Enabled | Usb20 : Enabled | +---------------------------------------+--------------------------------------+ Custom Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Custom Configuration | | (C) 2005 General Software, Inc. All rights reserved | +---------------------------------------+--------------------------------------+ | PCI INT A Assignment :>IRQ 11 | ISA IRQ 3 : Disabled | | PCI INT B Assignment : IRQ 11 | ISA IRQ 4 : Disabled | | PCI INT C Assignment : IRQ 11 | ISA IRQ 10 : Disabled | | PCI INT D Assignment : IRQ 9 | Reserved : Reserved | | Write protect BIOS : Enabled | Reserved : Reserved | | Video buffer size : 32 MB | LPT1 (378) Enable/IRQ : No IRQ | | Flat panel display : Disabled | Parallel Port Mode : Printer | | Video refresh rate : 60 Hz | COM1 (3F8) RS-232 : IRQ4 | | Video data width : 1 pix/clk | COM3 (3E8) RS-422/485 : Disabled | | Primary video device : Auto | COM4 (2E8) RS-422/485 : Disabled | | Memory timings : Optimal | Reserved : Reserved | | CPU Temp threshold : 80*C | BIOS extension : Disabled | | CPU overtemp IRQ : Disabled | Legacy USB support : Enabled | | CPU/Memory speeds : 500/333 MHz | IDE cable type : 40-Wire | | Periodic SMM IRQ : Enabled | | +---------------------------------------+--------------------------------------+ EPM-15 Reference Manual 11 Configuration and Setup Shadow Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Shadow/Cache Configuration | | (C) 2005 General Software, Inc. All rights reserved | +---------------------------------------+--------------------------------------+ | Shadowing :>Chipset | Shadow 16KB ROM at C000 : Enabled | | Shadow 16KB ROM at C400 : Enabled | Shadow 16KB ROM at C800 : Disabled | | Shadow 16KB ROM at CC00 : Disabled | Shadow 16KB ROM at D000 : Disabled | | Shadow 16KB ROM at D400 : Disabled | Shadow 16KB ROM at D800 : Disabled | | Shadow 16KB ROM at DC00 : Enabled | Shadow 16KB ROM at E000 : Enabled | | Shadow 16KB ROM at E400 : Enabled | Shadow 16KB ROM at E800 : Enabled | | Shadow 16KB ROM at EC00 : Enabled | Shadow 64KB ROM at F000 : Enabled | +---------------------------------------+--------------------------------------+ Note: Due to changes and improvements in the system BIOS, the information on your monitor may differ from that shown above. Operating System Installation The standard PC architecture used on the EPM-15 makes the installation and use of most of the standard x86 processor-based operating systems very simple. The operating systems listed on the VersaLogic OS Compatibility Chart use the standard installation procedures provided by the maker of the OS. Special optimized hardware drivers for a particular operating system, or a link to the drivers, are available at the EPM-15 Product Support web page at http://www.versalogic.com/private/manxsupport.asp. EPM-15 Reference Manual 12 3 3 Physical Details Dimensions EPM-15 DIMENSIONS AND MOUNTING HOLES The EPM-15 complies with all PC/104-Plus standards. Dimensions are given below to help with pre-production planning and layout. All dimensions are in inches. Drawings are not to scale. 3.575 3.375 3.275 3.175 0.200 0.100 0.000 -0.200 Figure 4. EPM-15 Dimensions EPM-15 Reference Manual 13 –0.550 –0.200 0.000 0.150 3.050 3.150 3.350 3.700 Physical Details CBR-5010 DIMENSIONS AND MOUNTING HOLES 5.50 5.10 1.575 1.875 1.175 1.95 1.38 0.065 Figure 5. CBR-5010 Dimensions EPM-15 Reference Manual 14 Physical Details HARDWARE ASSEMBLY The EPM-15 uses pass-through PC/104 and PC/104-Plus connectors so that expansion modules can be added to the top or bottom of the stack. PC/104 (ISA) modules must not be positioned between the EPM-15 and any PC/104-Plus (PCI) modules on the stack. The entire assembly can sit on a table top or be secured to a base plate. When bolting the unit down, make sure to secure all four standoffs to the mounting surface to prevent circuit board flexing. Standoffs are secured to the top circuit board using four pan head screws. See page 13 for dimensional details. Standoffs and screws are available as part number VL-HDW-101. An extractor tool is available (part number VL-HDW-201) to separate the PC/104 modules from the stack. Use caution when using the extractor tool not to damage any board components. STACK ARRANGEMENT EXAMPLE Figure 6. Stack Arrangement Example EPM-15 Reference Manual 15 Physical Details EPM-15 External Connectors D1 C1 J4 B1 A1 Ethernet J2 J13 PC/104-Plus Audio Battery J5 LPT J8 J1 Standard I/O Video (COM, USB, Output timer inputs, reset, LED, speaker) J6 J7 CompactFlash IDE CPU J10 PC/104 B1 A1 C0 D0 J9 Main Power = Pin 1 Figure 7. EPM-15 Connector Locations (Top) EPM-15 Reference Manual 16 Physical Details EPM-15 CONNECTOR LOCATIONS – BOTTOM D1 C1 B1 A1 PC-104-Plus (PCI) pass-through male J12 LVDS PC-104 (ISA) pass-through male B1 A1 C0 D0 = Pin 1 Figure 8. EPM-15 Connector Locations (Bottom) EPM-15 Reference Manual 17 Physical Details EPM-15 CONNECTOR FUNCTIONS AND INTERFACE CABLES Table 1 provides information about the function, mating connectors, and transition cables for EPM-15 connectors. Page numbers indicate where a detailed pinout or further information is available. Table 1: EPM-15 Connector Functions and Interface Cables 1 Transition Cable Description Pin 1 Location Page Connector Function Mating Connector Cable x coord. y coord. J1 Video Output FCI 89361-712 or CBR-1201 1’ 12-pin 2mm latching / 3.047 1.937 32 FCI 89947-712 15-pin HD D-Sub VGA J2 PC/104-Plus (PCI) AMP 1375799-1 — — 0.450 3.139 15 2 J3 PLD Reprogram- — — — — — — ming Port Ethernet RJ-45 J4 — — 3.100 2.637 36 LPT port FCI 89947-720 J5 CBR-2003 1’ 20-pin 2mm latching -0.385 2.437 31 IDC / 25-pin F D-Sub J6 CompactFlash Type I or Type II — — 1.100 2.017 — CompactFlash 3 J7 IDE Hard Drive FCI 89947-144 CBR-4406 1’ 44-pin 2mm latching / 3.303 1.937 27 Channel 1 two 44-pin 2mm J8 COM ports, USB FCI 89361-350LF CBR-5009A 50-pin standard I/O 3.551 2.172 29 ports, DB-9, timer cable to breakout board inputs, push-button CBR-5010 reset, PC speaker, LED 4 J9 Main Power Input Berg 69176-010 (housing) CBR-1008 Interface from standard 0.275 -0.075 22 + Berg 47715-000 (pins) ATX power supply J10 PC/104 (ISA) AMP 1375795-2 — — 0.050 0.200 15 2 J11 Process JTAG 2mm — — — — — DBUG J12 LVDS Molex 51146-2000 CBR-2010 or 18-bit TFT FPD using -0.277 1.236 33 (housing) CBR-2011 20-pin Hirose conn. or Molex 50641-8041 (pins) 18-bit TFT FPD using 20-pin JAE conn. J13 Audio FCI 89947-708LF or CBR-0803 12" latching 8-pin 2mm -0.129 2.909 37 FCI 89361-708LF to two 3.5mm stereo audio 1. The PCB Origin is the mounting hole to the lower left, as shown in Figures 8. 2. Connector not shown in drawings. 3. CBR-4405 44-pin to 40-pin adapter required to connect to 3.5-inch IDE drives with 40-pin connectors. 4. The J9 pin-1 coordinates for board revision 4.xx and earlier are x = 0.205, y = -0.068. The connector was moved slightly in revision 5.00 to match the position of the VL-EPM-5 power connector. EPM-15 Reference Manual 18 Physical Details Breakout Board Connectors CBR-5010 CONNECTOR LOCATIONS 5 J2 J1 ACPI Push- Paddle Board button Input 1 1 1 5 5 J5 J6 J3 J4 IDE LED Reset (top) COM4 COM3 COM1 USB0-3 PLED (bottom) USB0 USB1 USB2 USB3 = Pin 1 Figure 9. CBR-5010 Connector Locations CBR-5010 CONNECTOR FUNCTIONS AND MATING CONNECTORS Table 2: CBR-5010 Connector Functions and Interface Cables Connector Function PCB Connector Description J1 High Density Connector FCI 98414-F06-50ULF 2mm, 50-pin, keyed, latching header J2 ACPI Pushbutton Input Conta-Clip 10250.4 5-pin screw terminal J3 COM1 Kycon K42-E9P/P-A4N DB-9 male J4 USB 0-3 USB Type A USB Type A J5 COM4 Conta-Clip 10250.4 5-pin screw terminal J6 COM3 Conta-Clip 10250.4 5-pin screw terminal EPM-15 Reference Manual 19 1 2 3 Physical Details Jumper Blocks JUMPERS AS-SHIPPED CONFIGURATION 1 1 V2 V3 V1 * (or V5 ) 2 2 2 4 6 8 V4 1 3 5 7 Figure 10. Jumper Block Locations * Jumper block V1 was labeled V5 on revision 3.xx and earlier boards. EPM-15 Reference Manual 20 Physical Details JUMPER SUMMARY Table 3: Jumper Summary Jumper As Block Description Shipped Page V1 COM4 RS-422/485 Termination In 27 (or V5*) In – Line A and B terminated with 127 Ohms Out – No termination Note: Places terminating resistor across COM4 RS-485 TXRX+/TXRX- or RS-422 RX+/RX- differential pair. V2 Battery Power Jumper [1-2] In 23 [1-2] In – Standard Operation [2-3] In – Erase CMOS Warning: Use care when handling the EPM-15 not to short the V2 pins accidentally, which may cause CMOS to revert to factory settings. V3 COM3 RS-422/485 Termination In 27 In – Line A and B terminated with 127 Ohms Out – No termination Note: Places terminating resistor across COM3 RS-485 TXRX+/TXRX- or RS-422 RX+/RX- differential pair. V4[1-2] CompactFlash Master/Slave Selector In – In – Compact Flash Master Device Out – Compact Flash Slave Device V4[3-4] Video BIOS Selector In 32 In – Primary Video BIOS selected Out – Secondary Video BIOS selected Note: The secondary Video BIOS is field-upgradeable using the BIOS upgrade utility. See the private support page for more information. V4[5-6] System BIOS Selector In – In – Runtime system BIOS selected Out – Master system BIOS selected Note: The Runtime System BIOS is field upgradeable using the BIOS upgrade utility. See the private support page for more information. V4[7-8] ACPI Pushbutton Enable In 25 In – ACPI pushbutton disabled. Out – ACPI pushbutton enabled. * Jumper block V1 was labeled V5 on revision 3.xx and earlier boards. EPM-15 Reference Manual 21 4 4 System Features Power Supply POWER CONNECTORS Main power is applied to the EPM-15 through a 10-pin polarized connector, with mating connector Berg 69176-010 (Housing) + Berg 47715-000 (Pins). See the table below for connector pinout and Figure 7 for location information. Warning! To prevent severe and possibly irreparable damage to the system, it is critical that the power connectors are wired correctly. Make sure to use all +5VDC pins and all ground pins to prevent excess voltage drop. Some manufacturers include a pin-1 indicator on the crimp housing that corresponds to pin-10 of the pinout shown in Figure 11. Table 4: Main Power Connector Pinout J9 Signal Pin Name Description 1 GND Ground 2 +5VDC Power Input 3 GND Ground 4 +12VDC Power Input 5 GND Ground 6 -12VDC Power Input 7 +3.3VDC Power Input 8 +5VDC Power Input 9 GND Ground 10 +5VDC Power Input Figure 11 shows the VersaLogic standard pin numbering for this type of 10-pin power connector and the corresponding mating connector. Some manufacturers include a pin-1 indicator that corresponds to pin-10 of the power connector pinout J9 10 8 10 6 8 4 6 2 4 2 9 7 9 5 CBR-1008 7 5 3 3 1 1 Figure 11. J9 and CBR-1008 Pin Numbering EPM-15 Reference Manual 22 System Features Note: The +3.3VDC, +12VDC and -12VDC inputs are required only for expansion modules that require these voltages. POWER REQUIREMENTS The EPM-15 requires only +5 volts (±5%) for proper operation. The voltage required for the RS-232 ports is generated with an on-board DC/DC converter. A variable low-voltage supply circuit provides power to the CPU and other on-board devices. The exact power requirement of the EPM-15 depends on several factors, including memory configuration, CPU speed, peripheral connections, type and number of expansion modules and attached devices. For example, driving long RS-232 lines at high speed can increase power demand. LITHIUM BATTERY Warning! To prevent shorting, premature failure or damage to the lithium battery, do not place the board on a conductive surface such as metal, black conductive foam or the outside surface of a metalized ESD protective pouch. The lithium battery may explode if mistreated. Do not recharge, disassemble or dispose of in fire. Dispose of used batteries promptly. Normal battery voltage should be at least 3.0V. If the voltage drops below 2.7V, contact the factory for a replacement (part number T-HB3/0-1). The life expectancy under normal use is approximately 10 years. CPU The AMD LX microcontroller has a 32-bit, low-voltage AMD x86 microprocessor at its core. The maximum clock rate on the LX 800 is 500 MHz actual, with 800 MHz (Celeron equivalent) performance. The processor features 64 KB of L1 cache, 128 KB of L2 cache, DDR SDRAM support, and an integrated display controller. Typical power consumption is 1.6W. System RAM The EPM-15 has soldered-on DDR SDRAM with the following characteristics: ƒ Storage Capacity 256 MB ƒ Voltage 2.6V ƒ Type Unbuffered PC2100 (DDR266) or PC2700 (DDR333) CMOS RAM CLEARING CMOS RAM You can move the V2 jumper to position [2-3] for a minimum of three seconds to erase the contents of the CMOS RAM and the Real-Time Clock. When clearing CMOS RAM: 1) Power off the EPM-15. 2) Install the jumper on V2[2-3] and leave it for four seconds. 3) Move the jumper to back to V2[1-2]. 4) Power on the EPM-15. EPM-15 Reference Manual 23 System Features CMOS Setup Defaults The EPM-15 permits users to modify CMOS Setup defaults. This allows the system to boot up with user-defined settings from cleared or corrupted CMOS RAM, battery failure or battery-less operation. All CMOS setup defaults can be changed, except the time and date. CMOS Setup defaults can be updated with the BIOS Update Utility. See the General BIOS Information page for details. Warning! If CMOS Setup default settings make the system unbootable and prevent the user from entering CMOS Setup, the EPM-15 needs to be serviced by the factory. DEFAULT CMOS RAM SETUP VALUES After CMOS RAM is cleared, the system will load default CMOS RAM parameters the next time the board is powered on. The default CMOS RAM setup values will be used in order to boot the system whenever the main CMOS RAM values are blank, or when the system battery is dead or has been removed from the board. Real Time Clock The EPM-15 features a year 2000-compliant, battery-backed 146818-compatible real-time clock/calendar chip. Under normal battery conditions, the clock maintains accurate timekeeping functions when the board is powered off. SETTING THE CLOCK The CMOS Setup utility (accessed by pressing the Delete key during the early boot cycle) can be used to set the time and date of the real time clock. EPM-15 Reference Manual 24 System Features ACPI Power Management The EPM-15 supports the Advanced Configuration and Power Interface (ACPI) “S3 Sleeping State,” also known as “suspend to RAM” mode. Wakeup is accomplished by grounding pin 39 to pin 40 on connector J8 or via pushbutton (or relay attached to the pushbutton interface). Power consumption in standby mode is under 1 watt. Wakeup typically occurs in 1 to 6 seconds. Standby mode functionality has been tested under Windows XP and Windows XP Embedded. Also see the Power Management Control Block Diagram on page 4. THE S3 SLEEPING STATE The ACPI Specification defines the S3 sleeping state as a low wake latency sleeping state where all system context is lost except system memory. CPU, cache, and chipset context are lost in this state. The hardware maintains memory context and restores some CPU configuration context. Control starts from the processor’s reset vector after the wake event. Since the state of the operating system and all applications (including open documents) is sustained in main memory, the system can resume work exactly where it left off. The contents of main memory when the computer wakes from standby are the same as when it was put into standby. SETUP To set up the EPM-15 to use ACPI power management: 1. Verify that the CMOS Setup ACPI 1.0 setting is set to Enabled. This is the default setting. 2. If you plan to use a pushbutton or relay for wakeup, remove the jumper from jumper block V4[7-8]. Removing this jumper enables the ACPI pushbutton interface. 3. If you plan to use a pushbutton or relay for wakeup, attach the switch contacts to pins 3 and 4 of connector J2 on the CBR-5010 utility board. Pin 3 is ground, and pin 4 is the pushbutton input. (If you are not using CBR-5010, the pushbutton input is pin 40 of connector J8 on the EPM-15 motherboard.) 4. Install the most current drivers for all system devices. If a driver is not installed correctly, an exclamation point will appear before the device name in Device Manager. Incorrectly installed or older drivers may prevent the system from entering standby mode. ENTERING STANDBY MODE Standby mode can be entered through the operating system (by configuring the standby settings in Power Options Properties) or programmatically, through a function call or the execution of a shutdown utility. The Microsoft Windows utility DUMPPO.EXE can be used to set up and fine tune ACPI power states. EPM-15 Reference Manual 25 System Features SetSystemPowerState Function The “Power Management Reference” in the MSDN Library (http://msdn.microsoft.com/library/default.asp) contains complete information on the API available for power control under Windows. The “Power Management Functions” section provides complete information on the use of the API. The function used to set the system power state is SetSystemPowerState. This function suspends the system by shutting power down. Depending on the ForceFlag parameter, the function either suspends operation immediately or requests permission from all applications and device drivers before doing so. BOOL SetSystemPowerState( BOOL fSuspend, BOOL fForce ); Parameters: fSuspend [in] If this parameter is TRUE, the system is suspended. If the parameter is FALSE, the system hibernates. This parameter is ignored in Windows Me/98/95. fForce [in] If this parameter is TRUE, the function broadcasts a PBT_APMSUSPEND event to each application and driver, then immediately suspends operation. If the parameter is FALSE, the function broadcasts a PBT_APMQUERYSUSPEND event to each application to request permission to suspend operation. WAKEUP Wakeup is accomplished by grounding pin 39 to pin 40 on connector J8 or via pushbutton (or relay attached to the pushbutton interface). A pushbutton or relay can be attached to connector J2 on the CBR-5010 utility board. Pin 3 is ground, and pin 4 is the pushbutton input. This circuit on the EPM-15 motherboard has a 10k pull-up resistor. EPM-15 Reference Manual 26 5 5 Interfaces and Connectors Serial Ports The EPM-15 features three on-board 16550-based serial channels located at standard PC I/O addresses. Connector J8 provides interfaces to the COM ports. See Table 6 for COM port signal and pinout information. COM1 is an RS-232 (115.2K baud) serial port. COM3 and COM4 can be operated in RS-422 or RS-485 modes. Additional non-standard baud rates are also available (programmable in the normal baud registers) of up to 460K baud. Interrupt assignment for each COM port is handled in CMOS Setup, and each port can be independently enabled or disabled. Note: If a COM port is disabled in CMOS Setup, its I/O address space is available to the PC/104 (ISA) bus. All serial ports are protected against ESD damage. This protection exceeds the 15KV human body model. COM PORT CONFIGURATION There is no configuration jumper for COM1 because it operates only in RS-232 mode. Jumper blocks V1 (labeled V5 on 3.xx and earlier boards) and V3 are for termination of the RS- 422/485 differential pairs. See Table 3 for details on termination configuration. COM3 AND COM4 RS-485 MODE LINE DRIVER CONTROL The TxD+/TxD– differential line driver can be turned on and off by manipulating the RS-485/422 Transmit/Receive Control Register. Refer to page 44 for more information. The following code example shows how the BIOS initializes COM3 and COM4 to RS-422 mode: ; set up 485/422 register in pld mov dx, 1dah ; IO port in PLD mov al, 33h ; initialize RS-422/485 line drivers to RS-422 mode out dx, al EPM-15 Reference Manual 27 Interfaces and Connectors IDE Hard Drive / CD-ROM Interfaces The IDE interface is available to connect up to two IDE devices, such as hard disks, CD-ROM drives, or CompactFlash. Connector J7 is the primary IDE controller with a 44-pin 2 mm latching connector. Use CMOS setup to specify the drive parameters of the drive. If you use the on-board CompactFlash device, only one other IDE device can be connected to the IDE controller. Cable length must be 18" or less to maintain proper signal integrity. This interface supplies power to 2.5" IDE drives. If you are connecting a 3.5" drive to the interface (using the CBR-4405 44-pin to 40-pin IDE adapter), you must supply external power to the drive. The power cable attached to a 3.5" drive must be properly grounded so that motor current is not returned via the grounds in the data cable. Table 5: J7 IDE Hard Drive Connector Pinout Pin Signal Name Function Pin Signal Name Function 1 Reset- Reset signal from CPU 23 DIOW I/O write 2 Ground Ground 24 Ground Ground 3 DD7 Data bus bit 7 25 DIOR I/O read 4 DD8 Data bus bit 8 26 Ground Ground 5 DD6 Data bus bit 6 27 IORDY I/O ready 6 DD9 Data bus bit 9 28 CSEL Cable select 7 DD5 Data bus bit 5 29 DMACK- DMA acknowledge 8 DD10 Data bus bit 10 30 Ground Ground 9 DD4 Data bus bit 4 31 INTRQ Interrupt request 10 DD11 Data bus bit 11 32 NC No connection 11 DD3 Data bus bit 3 33 DA1 Device address bit 1 12 DD12 Data bus bit 12 34 CBLID- Cable type identifier 13 DD2 Data bus bit 2 35 DA0 Device address bit 0 14 DD13 Data bus bit 13 36 DA2 Device address bit 2 15 DD1 Data bus bit 1 37 CS0 Chip select 0 16 DD14 Data bus bit 14 38 CS1 Chip select 1 17 DD0 Data bus bit 0 39 DASP- LED 18 DD15 Data bus bit 15 40 Ground Ground 19 Ground Ground 41 Power +5.0 V 20 NC Key 42 Power +5.0 V 21 PDMARQ DMA request 43 Ground Ground 22 Ground Ground 44 NC No connection EPM-15 Reference Manual 28 Interfaces and Connectors J8 Utility Connector The J8 50-pin utility connector incorporates the COM ports, USB ports, LEDs, speaker, and the reset button. Table 6 illustrates the function of each pin and the pinout assignments to connectors on the CBR-5010 breakout board. Table 6: J8 Utility Connector Pinout J8 External J8 External Pin Connector Pin Signal Pin Connector Pin Signal 1 1 Data Carrier Detect 27 TM4 Ground COM1 USB1 2 J3 6 Data Set Ready 28 J4 TM1 +5V (Protected) 3 2 Receive Data 29 TM3 Channel 1 Data + 4 7 Request to Send 30 TM2 Channel 1 Data - 5 3 Transmit Data 31 USB2 BM4 Ground 6 8 Clear to Send 32 J4 BM1 +5V (Protected) 7 4 Data Terminal Ready 33 BM3 Channel 2 Data + 8 9 Ring Indicator 34 BM2 Channel 2 Data - 9 5 Ground 35 USB3 B4 Ground 10 – Ground 36 B1 +5V (Protected) J4 37 B3 Channel 3 Data + COM3 RS-422 RS-485 11 J6 5 TxD+ (note) 38 B2 Channel 3 Data - 12 4 TxD– (note) 39 ACPI Push- 3 Ground 13 1 GroundGround 40 button J2 4 EIRQ1 14 3 RxD+ TxD/RxD+ 41 – reserved 15 2 RxD– TxD/RxD– 42 – reserved 16 – Ground Ground 43 PROG LED 1 +5V (Protected) COM4 RS-422 RS-485 44 D1 3 Programmable LED J5 17 5 TxD+ (note) 45 IDE LED 2 +5V (Protected) 18 4 TxD– (note) 46 4 IDE LED D1 19 1 GroundGround 47 – +5V (Protected) Speaker 20 3 RxD+ TxD/RxD+ 48 S1 SP1 Speaker Drive 21 2 RxD– TxD/RxD– 49 PBRESET 1 Ground 22 – Ground Ground 50 J2 2 Pushbutton Reset 23 USB0 T4 Ground 24 T1 +5V (Protected) J4 25 T3 Channel 0 Data + 26 T2 Channel 0 Data - Note: Do not connect to these pins in RS-485 mode. EPM-15 Reference Manual 29 Interfaces and Connectors USB INTERFACE Connector J8 includes interfaces for four USB ports. The USB interface on the EPM-15 is UHCI (Universal Host Controller Interface) and EHCI (Enhance Host Controller Interface) compatible, which provides a common industry software/hardware interface. There are four USB connectors on the CBR-5010 breakout board. BIOS Configuration The USB controller can be enabled or disabled in the CMOS setup. The USB controller uses PCI interrupt “INTD#”. The CMOS setup screen is used to select the IRQ line routed to each PCI interrupt line. PROGRAMMABLE LED Connector J8 includes an output signal for a software controlled LED. Connect the cathode of the LED to J8 pin 44; connect the anode to +5V. An on-board resistor limits the current to 15 mA when the circuit is turned on. A programmable LED is provided on the CBR-5010 breakout board. To turn the LED on and off, set or clear bit D7 in I/O port 1D0h. When changing the register, make sure not to alter the value of the other bits. The following code examples show how to turn the LED on and off. Refer to page 41 for further information: LED On LED Off MOV DX,1D0H MOV DX,1D0H IN AL,DX IN AL,DX OR AL,80H AND AL,7FH OUT DX,AL OUT DX,AL Note: The LED is turned on by the BIOS during system startup. This causes the light to function as a "power on" indicator if it is not otherwise controlled by user code. The BIOS also flashes the LED in sync with “Beep Codes” when an error occurs. IDE LED Connector J8 includes an output signal for an IDE Activity LED. Connect the cathode of the LED to J8 pin 46, and connect the anode to +5V. An on-board resistor limits the current to 15 mA when the circuit is turned on. An IDE LED is provided on the CBR-5010 board. INTERNAL SPEAKER Connector J8 includes a speaker output signal at pin 48. The CBR-5010 breakout board provides a Piezo electric speaker. PUSH-BUTTON RESET Connector J8 includes an input for a push-button reset switch. Shorting J8 pin 50 to ground causes the EPM-15 to reboot. This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage. EPM-15 Reference Manual 30 Interfaces and Connectors Parallel Port The EPM-15 includes a standard bi-directional/EPP/ECP compatible LPT port which resides at the PC standard address of 378h. The port can be enabled or disabled and interrupt assignments can be made via CMOS Setup. The LPT mode is also set via CMOS Setup. This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage. Table 7: LPT1 Parallel Port Pinout J5 Centronics Signal Pin Signal Direction 1 Strobe Out 2 Auto feed Out 3 Data bit 1 In/Out 4 Printer error In 5 Data bit 2 In/Out 6 Reset Out 7 Data bit 3 In/Out 8 Select input Out 9 Data bit 4 In/Out 10 Data bit 5 In/Out 11 Data bit 6 In/Out 12 Data bit 7 In/Out 13 Data bit 8 In/Out 14 Ground – 15 Acknowledge In 16 Ground – 17 Port Busy In 18 Ground – 19 Paper End In 20 Select In EPM-15 Reference Manual 31 Interfaces and Connectors Video Interface An on-board video controller integrated into the chipset provides high performance video output for the EPM-15. (The EPM-15 can also be operated without video card attached. See “Console Redirection.”) CONFIGURATION The EPM-15 uses a shared-memory architecture. This allows the video controller to use 16 MB of system DRAM for video RAM. The EPM-15 supports two types of video output, SVGA and LVDS Flat Panel Display. VIDEO BIOS SELECTION Jumper V4[3-4] can be removed to allow the system to boot off of the Secondary Video BIOS. Unlike the Primary Video BIOS, the Secondary Video BIOS can be reprogrammed in the field. SVGA OUTPUT CONNECTOR See Figure 7 for connector location information. An adapter cable, part number CBR-1201, is available to translate J1 into a standard 15-pin D-Sub SVGA connector. This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage. Table 8: Video Output Pinout J1 Signal Mini DB15 Pin Name Function Pin 1 GND Ground 6 2 CRED Red video 1 3 GND Ground 7 4 CGRN Green video 2 5 GND Ground 8 6 CBLU Blue video 3 7 GND Ground 5 8 CHSYNC Horizontal Sync 13 9 GND Ground 10 10 CVSYNC Vertical Sync 14 11 – pulled high – 12 – pulled high – EPM-15 Reference Manual 32 Interfaces and Connectors LVDS FLAT PANEL DISPLAY CONNECTOR The integrated LVDS Flat Panel Display in the EPM-15 is an ANSI/TIA/EIA-644-1995 specification-compliant interface. It can support up to 24 bits of RGB pixel data plus 3 bits of timing control (HSYNC/VSYNC/DE) on the 4 differential data output pairs. The LVDS clock frequency ranges from 25 MHz to 85 MHz. The 3.3V power provided to pins 19 and 20 of J12 is protected by a 1 Amp fuse. See Figure 8 for connector location information. Table 9: LVDS Flat Panel Display Pinout J12 Signal Name Pin Function 1 GND Ground 2 NC No Connection 3 LVDSA3 Diff. Data 3 (+) 4 LVDSA3# Diff. Data 3 (–) 5 GND Ground 6 LVFSCLK0 Differential Clock (+) 7 LVDSCLK0# Differential Clock (–) 8 GND Ground 9 LVDSA2 Diff. Data 2 (+) 10 LVDSA2# Diff. Data 2 (–) 11 GND Ground 12 LVDSA1 Diff. Data 1 (+) 13 LVDSA1# Diff. Data 1 (–) 14 GND Ground 15 LVDSA0 Diff. Data 0 (+) 16 LVDSA0# Diff. Data 0 (–) 17 GND Ground 18 GND Ground 19 +3.3V Protected Power Supply 20 +3.3V Protected Power Supply EPM-15 Reference Manual 33 Interfaces and Connectors COMPATIBLE LVDS PANEL DISPLAYS The following list of flat panel displays is reported to work properly with the integrated graphics video controller chip used on the EPM-15. Table 10: Compatible Flat Panel Displays Model Panel Panel Manufacturer Number Size Resolution Interface Technology eVision Displays xxx084S01 series 8.4” 800 x 600 18-bit LVDS TFT au Optronix B084SN01 8.4” 800 x 600 18-bit LVDS TFT eVision Displays xxx104S01 series 10.4” 800 x 600 18-bit LVDS TFT au Optronix B104SN01 10.4” 800 x 600 18-bit LVDS TFT Sharp LQ121S1LG411 12.1” 800 x 600 18-bit LVDS TFT eVision Displays* xxx141X01 series 14.1” 1024 x 768 18-bit LVDS TFT * Compatible with DOS or Windows Generic VGA driver, but not the GX Windows driver. CONSOLE REDIRECTION The EPM-15 can be operated without using the onboard video output by redirecting the console to COM1. CMOS Setup and some operating systems such as DOS can use this console for user interaction. In the Features Configuration screen, there is an option to control console redirection. This option can be set to Auto or Redirect. When set to Auto, the console will not be redirected to COM1. When set to Redirect, the console will be directed to COM1. Notes on console redirection: ƒ When console redirection is enabled, you can access CMOS Setup by typing Ctrl-C. ƒ The decision to redirect the console is made early in BIOS execution, and cannot be changed later. ƒ The redirected console uses 115200 baud, 8 data bits, 1 stop bit, no parity, and no flow control. ƒ The default console redirection setting is "Auto". The defaults can be reloaded without entering BIOS setup by discharging CMOS contents (consult the reference manual for instructions). EPM-15 Reference Manual 34 Interfaces and Connectors Null Modem The following diagram illustrates a typical DB9 to DB9 RS-232 null modem adapter. System 1 <--> System 2 Name Pin Pin Name ------------------------------------ TX 3 <--> 2 RX RX 2 <--> 3 TX RTS 7 <--> 1 DCD CTS 8 DSR 6 <--> 4 DTR DCD 1 <--> 7 RTS 8 CTS DTR 4 <--> 6 DSR Pins 7 and 8 are shorted together on each connector. Unlisted pins have no connection. EPM-15 Reference Manual 35 Interfaces and Connectors Ethernet Interface The EPM-15 features an on-board Ethernet controller. For the EPM-15g and h, the controller is the Intel 82551ER Fast Ethernet controller. For the EPM-15S and E, the controller is the Intel 82541ER controller. While these controllers are not NE2000-compatible, they are widely supported. Drivers are readily available to support a variety of operating systems. See VersaLogic website for latest OS support. BIOS CONFIGURATION The Ethernet interface (J4) uses PCI interrupt “INTB#”. The CMOS setup screen is used to select the IRQ line routed to each PCI interrupt line. STATUS LED The EPM-15 includes an on-board, two-colored LED to provide an indication of the Ethernet status as follows: Green LED (Link) ƒ ON Active Ethernet cable plugged in ƒ OFF Active cable not plugged in or cable not plugged into active hub Yellow LED (Activity) ƒ ON Activity detected on cable ƒ OFF No Activity detected on cable ETHERNET CONNECTOR A board-mounted RJ-45 connector is provided to make connection with a Category 5 Ethernet cable. The Ethernet controller autodetects 10BaseT/100Base-TX connection speed. The interface uses IEC 61000-4-2-rated TVS components to help protect against ESD damage. EPM-15 Reference Manual 36 Interfaces and Connectors Audio The audio interface on the EPM-15 is implemented using the Analog Devices AD1981B Audio Codec (EPM-15g, h) or the National Semiconductor LM4549B (EPM-15S, E). This interface is AC ’97 2.1 compatible. Drivers are available for most Windows-based operating systems. To obtain the most current versions, consult the EPM-15 product support page. J13 provides the line-level stereo input and line-level stereo output connection points. The outputs will drive any standard-powered PC speaker set. These connectors use IEC 61000-4-2-rated TVS components to help protect against ESD damage. SOFTWARE CONFIGURATION The audio interface uses PCI interrupt “INTB#”. CMOS Setup is used to select the IRQ line routed to INTB#. The audio controller can be disabled within CMOS Setup. Table 11: J13 Audio Connector Signal Name Function Pin 1 LINE_OUTR Line-Out Right 2 Ground Ground 3 LINE_OUTL Line-Out Left 4 Ground Ground 5 LINE_INR Line-In Right 6 Ground Ground 7 LINE_INL Line-In Left 8 Ground Ground CPU Temperature Monitor A thermometer circuit constantly monitors the die temperature of the CPU. This circuit can be used to detect over-temperature conditions, which can result from fan or heat sink failure or excessive ambient temperatures, and under-temperature conditions. The CMOS setup is used to set the temperature detection threshold. A status bit in the Special Control Register bit D5 of I/O port 1D0h, can be read to determine if the die temperature is above or below the threshold. Contact the factory for information on clearing the status bit or reading and writing to the thermometer circuit. See page 41 for additional information. EPM-15 Reference Manual 37 Interfaces and Connectors PC/104 Expansion Bus EPM-15 has limited support of the PC/104 bus. Most PC/104 cards will work, but be sure to check the requirements of your PC/104 card against the list below. PC/104 I/O SUPPORT The following I/O ranges are supported: ƒ 100h – 1CFh ƒ 1D3h – 1D9h ƒ 1DBh – 1DFh ƒ 200h – 377h ƒ 37Fh – 3AFh ƒ 3E0h – 3F5h ƒ 3F7h ƒ 400h – 47Fh ƒ 490h – 4CFh ƒ 4D2h – 777h ƒ 77Ch – AFFh PC/104 MEMORY SUPPORT Memory ranges supported: ƒ C8000h-DBFFFh, 8-bit transfers only ƒ DFBF4h ƒ DFE88h ƒ DFE94 IRQ SUPPORT The following IRQs are available on the PC/104 bus: ƒ IRQ 3, IRQ 4, IRQ 10 Each of the three IRQs must be enabled in CMOS Setup before they can be used on the ISA bus. Because ISA IRQ sharing is not supported, make sure that any IRQ channel used for an ISA device is not used elsewhere. For example, if ISA IRQ 4 is enabled, you must use a different IRQ for COM1. DMA SUPPORT The current revision of the board does not support PC/104 DMA. EPM-15 Reference Manual 38 6 6 System Resources and Maps Memory Map The lower 1 MB memory map of the EPM-15 is arranged as shown in the following table. Various blocks of memory space between C0000h and FFFFFh can be shadowed. The CMOS setup is used to enable or disable this feature. Table 12: Memory Map Start End Address Address Comment E0000h FFFFFh System BIOS DC000h DFFFFh Reserved D0000h DBFFFh PC/104 C0000h CFFFFh Video BIOS A0000h BFFFFh Video RAM 00000h 9FFFFh System RAM I/O Map The following table lists the common I/O devices in the EPM-15 I/O map. User I/O devices should be added using care to avoid the devices already in the map as shown in the following table. Table 13: On-Board I/O Devices Standard I/O Device I/O Addresses Special Control Register 1D0h Jumper and Status Register 1D2h RS-485/422 Tx/Rx Control Register 1DAh Reserved 1E0h Primary Hard Drive Controller 1F0h – 1F7h COM4 Serial Port 2E8h – 2EFh LPT1 Parallel Port 378h – 37Fh COM3 Serial Port 3E8h – 3EFh COM1 Serial Port 3F8h – 3FFh Note: The I/O ports occupied by on-board devices are freed up when the device is disabled in the CMOS setup. EPM-15 Reference Manual 39 System Resources and Maps Interrupt Configuration The EPM-15 has the standard complement of PC type interrupts. Three non-shared interrupts are routed to the PC/104 bus, and up to four IRQ lines can be allocated as needed to PCI devices. There are no interrupt configuration jumpers. All configuration is handled through CMOS Setup. Table 14: EPM-15 IRQ Settings z = default setting | = allowed setting IRQ Source 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 z Timer 0 z Keyboard z Slave PIC | z | { | | | COM1 COM3 | | { | | | | COM4 | | | | | | | z Floppy z RTC z Mouse z Math Chip z Pri. IDE | | | | | | | LPT1 CPU Temp | | | | | | ISA IRQ3 | ISA IRQ4 | | ISA IRQ10 PCI INTA# | | | z | | | | z | PCI INTB# | | | z | PCI INTC# | z | | | PCI INTD# Table 15: PCI Interrupt Settings z = default setting | = allowed setting PCI Interrupt Source INTA# INTB# INTC# INTD# z Ethernet z Audio z USB Notes: ƒ If your design needs to use interrupt lines on the PC/104 bus, IRQ10 is recommended. (IRQ3 and IRQ4 are normally used by COM ports on the main board.) ƒ Though the EPM-15 is not equipped with a standard keyboard (IRQ1), floppy disk (IRQ6), or mouse (IRQ12), the BIOS infrastructure makes it appear they exist for DOS and older operating systems. Though these devices use USB interrupts, legacy IRQs are created via software. ƒ ACPI uses IRQ9. IRQ9 should not be assigned to other devices if ACPI is enabled. EPM-15 Reference Manual 40 7 7 Special Registers Special Control Register SCR (READ/WRITE) 1D0h D7 D6 D5 D4 D3 D2 D1 D0 PLED Reserved OVERTEMP Reserved Reserved Reserved Reserved Reserved Table 16: Special Control Register Bit Assignments Bit Mnemonic Description D7 PLED Light Emitting Diode — Controls the programmable LED on connector J4 0 = Turns LED on 1 = Turns LED off D6 Reserved Reserved — This bit has no function. D5 OVERTEMP Temperature Status — Indicates CPU temperature. 0 = CPU temperature is below value set in the CMOS setup 1 = CPU temperature is above value set in the CMOS setup This bit is read-only. D4-D0 Reserved Reserved — These bits have no function. EPM-15 Reference Manual 41 Special Registers Revision Indicator Register REVIND (READ ONLY) 1D1h D7 D6 D5 D4 D3 D2 D1 D0 PC4 PC3 PC2 PC1 PC0 EXT REV1 REV0 This register is used to indicate the revision level of the EPM-15. Table 17: Revision Indicator Register Bit Assignments Bit Mnemonic Description D7-D3 PC Product Code — These bits are hard-coded to represent the product type. The EPM-15 always reads as 00011. Other codes are reserved for future products. PC4 PC3 PC2 PC1 PC0 Product Code 0 0 0 1 1 EPM-15 These bits are read-only. D2 EXT Extended Temperature — Indicates operating temperature range. 0 = Standard temperature range 1 = Extended temperature range D1-D0 REV Revision Level — These bits represent the EPM-15 circuit revision level. REV1 REV0 Revision Level 0 0 Initial product release, Rev 1, 2 and 3 These bits are read-only. EPM-15 Reference Manual 42 Special Registers Jumper and Status Register JSR (READ/WRITE) 1D2h D7 D6 D5 D4 D3 D2 D1 D0 Reserved VB-SEL SB-SEL Reserved Reserved Reserved Reserved Reserved Table 18: Jumper and Status Register Bit Assignments Bit Mnemonic Description D7 Reserved This bit has no function. D6 VB-SEL Video BIOS Selection — Indicates the status of jumper. 0 = Jumper out, Secondary Video BIOS selected. 1 = Jumper in, Primary Video BIOS selected. This bit is read-only. D5 SB-SEL System BIOS Selection — Indicates the status of jumper. 0 = Jumper out, Master System BIOS selected. 1 = Jumper in, Run Time System BIOS selected. This bit is read-only. D4-D0 Reserved Reserved — These bits have no function. EPM-15 Reference Manual 43 Special Registers RS-485/422 Transmit/Receive Control Register RS485/422 (READ/WRITE) 1DAh D7 D6 D5 D4 D3 D2 D1 D0 Reserved COM4TE485 COM4RE4XXCOM4TE422 Reserved COM3TE485 COM3RE4XX COM3TE422 Table 19: RS-485/422 Tx/Rx Register Bit Assignments Bit Mnemonic Description D7 Reserved This bit has no function. D6 COM4TE485 COM4 RS-485 Transmit Enable — Controls RS-485 Tx on COM4. 0 = Disable RS-485 transmitter on COM4. 1 = Enable RS-485 transmitter on COM4. D5 COM4RE4XX COM4 RS-485/422 Receive Enable — Controls RS-485/422 Rx on COM4. 0 = Disable RS-485/422 receiver on COM4. 1 = Enable RS-485/422 receiver on COM4. D4 COM4TE422 COM4 RS-422 Transmit Enable — Controls RS-422 Tx on COM4. 0 = Disable RS-422 transmitter on COM4. 1 = Enable RS-422 transmitter on COM4. D3 Reserved Reserved — This bit has no function. D2 COM3TE485 COM3 RS-485 Transmit Enable — Controls RS-485 Tx on COM3. 0 = Disable RS-485 transmitter on COM3. 1 = Enable RS-485 transmitter on COM3. D1 COM3RE4XX COM3 RS-485/422 Receive Enable — Controls RS-485/422 Rx on COM3. 0 = Disable RS-485/422 receiver on COM3. 1 = Enable RS-485/422 receiver on COM3. D0 COM3TE422 COM3 RS-422 Transmit Enable — Controls RS-422 Tx on COM3. 0 = Disable RS-422 transmitter on COM3. 1 = Enable RS-422 transmitter on COM3. EPM-15 Reference Manual 44 A A Appendix A – References PC Chipset Advanced Micro Devices AMD LX Chipset Ethernet Controller Intel Corporation Intel 82551ER Intel 82541ER Video Controller In chipset. PC/104 Specification PC/104 Consortium PC/104 Resource Guide PC/104-Plus Specification VersaLogic Corporation PC/104 Resource Guide General PC Documentation Microsoft Press The Programmer’s PC Sourcebook General PC Documentation Powell’s Books The Undocumented PC EPM-15 Reference Manual 45 B B Appendix B – Generated Frequencies The following frequencies on the EPM-15 board can be measured for EMI/EMC testing. Table 20: Generated Frequencies Component Frequencies Notes 10/100 Ethernet 25 MHz Y1 crystal, U7 82551ER chip. RTC 32.768 kHz Y2 crystal, U13A CS5536 chip. System Clock 14.318 MHz Y3 crystal, U34 MK1491-09F chip. REF Clock 14.318 MHz IOAPC Clock 14.318 MHz PCI Clock 33.3 MHz USB 48 MHz Y4 crystal, U13B CS5536 chip. Audio 24.576 MHz Y5 crystal, U44 AD1981B chip. PCI Bus 33.3 MHz Fixed frequency. ISA Bus 8 MHz VCore Switching 1 MHz Switching frequency. Regulator Memory 111 MHz or 222 transfers per second EPM-15 Reference Manual 46