r’ Book Number: AR-B1564-99.A01 Edition: 1.0 s GuideUse All-In-One CPU BOARD DISK SIZE PENTIUM(586) AR-B1564 ¡¦ 0........................................................................................................................................................0-3 COPYRIGHT NOTICE AND DISCLAIMER WELCOME TO THE AR-B1564 CPU BOARD BEFORE YOU USE THIS GUIDE RETURNING YOUR BOARD FOR SERVICE TECHNICAL SUPPORT AND USER COMMENTS ORGANIZATION STATIC ELECTRICITY PRECAUTIONS 1......................................................................................................................................................1-1 INTRODUCTION PACKING LIST FEATURES 2.................................................................................................................................2-1 DMA CONTROLLER INTERRUPT CONTROLLER I/O Port Address Map Real-Time Clock and Non-Volatile RAM SERIAL PORT PARALLEL PORT 3.............................................................................................................................3-1 OVERVIEW SYSTEM SETTING Serial Port Hard Disk (IDE) Connector Power Connector. FDD Port Connector (CN7) Parallel Port Connector (CN8) PC/104 Connector CPU Setting Memory Setting LED Header 3.2.10PS/2 Mouse 3.2.11Keyboard Connector (J6) 3.2.12External Speaker Header (J4) 3.2.13Reset Header (J13) 3.2.14USB Connector (CN2) 3.2.1526-Pin Audio Connector (CN9) 3.2.16D.O.C. Memory Address Select (SW2- 3.2.17120-Pin PCI Connector (BUS1) 4...................................................................................................................4-1 CRT CONNECTOR (C LCD FLAT PANEL DISPLAY LCD Supported Voltage Select (JP8). DE/E Signal from M or LP Select (JP3) LCD Panel Display Connector (CN12) Touch Screen Connector SUPPORTED LCD PANEL 5.............................................................................................................................5-1 OVERVIEW FEATURES NETWORK PORT Ethernet Connector (J2) Network Active LED Header (J10) Network 100Mbps Transferring LED Header (J12) 6...............................................................................................................................................6-1 OVERVIEW UTILITY DISKETTE VGA Driver Network Utility Audio Driver WATCHDOG TIMER Watchdog Timer Setting 0-1 6-6......................................................................................................................................................6.3.1 6-6...................................................................................................................................................................6.3 6-4.........................................................................................................................................................................6.2.3 6-4......................................................................................................................................................................6.2.2 6-2...........................................................................................................................................................................6.2.1 6-1.....................................................................................................................................................................6.2 6-1..................................................................................................................................................................................6.1 INSTALLATION 5-2............................................................................................................5.3.3 5-2......................................................................................................................................5.3.2 5-1......................................................................................................................................................5.3.1 5-1.......................................................................................................................................................................5.3 5-1..................................................................................................................................................................................5.2 5-1..................................................................................................................................................................................5.1 ERETHERNET CONTROLL 4-4.........................................................................................................................................................4.3 4-4............................................................................................................................................. (J3)4.2.4 4-3...............................................................................................................................4.2.3 4-3..............................................................................................................................4.2.2 4-3................................................................................................................................4.2.1 4-2......................................................................................................................................................4.2 4-1........................................................................................................................................................N13)4.1 CRT/LCD FLAT PANEL DISPLAY 3-20.................................................................................................................................... 3-19.....................................................................................................................4) 3-19..................................................................................................................................... 3-18................................................................................................................................................... 3-18....................................................................................................................................................... 3-18...................................................................................................................................... 3-17.............................................................................................................................................. 3-17................................................................................................................................................................... 3-16.......................................................................................................................................................................3.2.9 3-16..................................................................................................................................................................3.2.8 3-12.......................................................................................................................................................................3.2.7 3-10.............................................................................................................................................................3.2.6 3-9............................................................................................................................................3.2.5 3-8.................................................................................................................................................3.2.4 3-8................................................................................................................................................................3.2.3 3-7.................................................................................................................................................3.2.2 3-2............................................................................................................................................................................3.2.1 3-2.....................................................................................................................................................................3.2 3-1..................................................................................................................................................................................3.1 SETTING UP THE SYSTEM 2-7........................................................................................................................................................................2.5 2-5.............................................................................................................................................................................2.4 2-4....................................................................................................................................................................................Timer2.3.3 2-4............................................................................................................................2.3.2 2-3..........................................................................................................................................................2.3.1 2-2......................................................................................................................................................2.3 2-1.........................................................................................................................KEYBOARD CONTROLLER AND PS/2 MOUSE2.2 2-1...................................................................................................................................................................2.1 SYSTEM CONTROLLER 1-2..................................................................................................................................................................................1.3 1-1............................................................................................................................................................................1.2 1-1.........................................................................................................................................................................1.1 OVERVIEW 0-4....................................................................................................................................0.7 0-4..........................................................................................................................................................................0.6 0-3...................................................................................................................0.5 0-3............................................................................................................................0.4 0-3...............................................................................................................................................0.3 0-3...........................................................................................................................0.2 0-3................................................................................................................................0.1 PREFACE Table of Contents s GuideAR-B1564 User ¡¦ Watchdog Timer Enabled Watchdog Timer Trigger Watchdog Timer Disabled 7..............................................................................................................................................7-1 BIOS SETUP OVERVIEW STANDARD CMOS SETUP ADVANCED CMOS SETUP ADVANCED CHIPSET SETUP POWER MANAGEMENT PCI/PLUG AND PL. PERIPHERAL SETUP. AUTO-DETECT HARD DISKS PASSWORD SETTING Setting Password Password Checking LOAD DEFAULT SETTING 7.10.1Auto Configuration with Optimal Setting 7.10.2Auto Configuration with Fail Safe Setting BIOS EXIT 7.11.1Save Settings and Exit 7.11.2Exit Without Saving BIOS UPDATE 8...........................................................................................................................................8-1 9.......................................................................................................................9-1 PLACEMENT DIMENSIONS 10............................................................................................................. PROGRAMMING RS-485 INDEX 0-2 10-3....................................................................................................................................................................................10.2 10-1.....................................................................................................................................................10.1 10-185 & INDEXPROGRAMMING RS-4 9-2..............................................................................................................................................................................9.2 9-1...............................................................................................................................................................................9.1 PLACEMENET & DIMENSIONS SPECIFICATIONS 7-11.......................................................................................................................................................................7.12 7-11....................................................................................................................................................... 7-11.................................................................................................................................................. 7-11.............................................................................................................................................................................7.11 7-10..................................................................................................................... 7-10....................................................................................................................... 7-10..................................................................................................................................................7.10 7-10...........................................................................................................................................................7.9.2 7-10...............................................................................................................................................................7.9.1 7-10.............................................................................................................................................................7.9 7-10..................................................................................................................................................7.8 7-9................................................................................................................................................................7.7 7-8................................................................................................................................................................AY7.6 7-7............................................................................................................................................................7.5 7-6...................................................................................................................................................7.4 7-3........................................................................................................................................................7.3 7-2........................................................................................................................................................7.2 7-1..........................................................................................................................................................7.1 BIOS CONSOLE 6-7...................................................................................................................................................6.3.4 6-7......................................................................................................................................................6.3.3 6-7....................................................................................................................................................6.3.2 s GuideAR-B1564 User ¡¦ 0. 0.1 disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Acrosser Technology reserves the right to revise this publication and to make changes from time to time in the contents Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid into any language or computer language, in any form or any means, electronic, mechanical, magnetic, optical, P…are . 0.2 WELCOME TO THE d’ 0.3 “” in this AR-B1564 serial diskette provides the newest information about the card. Please refer to the README.DOC file of the enclosed utility diskette. It contains the modification and hardware & software information, and 0.4 If you need to ship your board to us for service, be sure it is packed in a protective carton. We recommend that 1. 2. 3. 0.5 TECHNICAL SUPPORT AND USER COMMENTS ’s comments are always welcome as they assist us in improving the usefulness of our products and the understanding of our publications. They form a very important part of the input used for product enhancement 0-3 webmaster@acrosser.comInternet electronic mail to: Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative. and book number. If you have suggestions for improving particular sections or if you find any errors, please indicate the manual title any obligation. You may, of course, continue to use the information you supply. We may use and distribute any of the information you supply in any way we believe appropriate without incurring and revision. User A brief description is in the symptoms. A description of the system configuration and/or software at the time is malfunction. g the day.Include your name, address, telephone and facsimile number where you may be reached durin You can help assure efficient servicing of your product by following these guidelines: you keep the original shipping container for this purpose. If your board requires servicing, contact the dealer from whom you purchased the product for service information. RETURNING YOUR BOARD FOR SERVICE adding the description or modification of product function after manual published. guide. Check the packing list, make sure the accessories in the package. Setting Up the SystemIf you have not already installed this AR-B1564 CPU card, refer to the Chapter 3, BEFORE YOU USE THIS GUIDE serial CPU board. You also could find general system information here. s functions, features, and how to start, set up and operate your AR-B1564Use the information describes this car This guide introduces the Acrosser AR-B1564 CPU board. CPU BOARDAR-B1564 Adobe Acrobat 3.01This document was produced with All other trademarks and registered trademarks are the property of their respective holders. registered trademarks.HITACHI, ORION, SHAR 95, Windows NT, LAN, Netware, CHIPS, NEC,Acrosser, ALI, AMI, PC/AT, Windows for Workgroup 3.11, Windows chemical, manual or otherwise, without the prior written consent of Acrosser Technology. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated Acrosser Technology Co., Ltd., 1999. All rights Reserved.(C) Copyright written license from Acrosser or an authorized sublicensor. hereof without obligation of Acrosser Technology to notify any person of such revisions or changes. Acrosser Technology makes no representations or warranties with respect to the contents hereof and specifically June 1999 COPYRIGHT NOTICE AND DISCLAIMER PREFACE s GuideAR-B1564 User ¡¦ 0.6 l “” l “” l “” l Chapter 4, “CRT/LCD Flat Panel Display”, describes the configuration and installation procedure using l “” l “” l “” l l l 0.7 Static electricity is a constant danger to computer systems. The charge that can build up in your body may be more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic precautions whenever you use or handle computer components. Although areas with humid climates are much · Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded · When unpacking and handling the board or other system component, place all materials on an antic static · “” 0-4 of every board. connectors on the bottomgolden fingerBe careful not to touch the components on the board, especially the surface. wrist strap). following measures should generally be sufficient to protect your equipment from static discharge: less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The Before removing the board from its anti-static bag, read this section about static electricity precautions. STATIC ELECTRICITY PRECAUTIONS Programming RS-485 & IndexChapter 10, Chapter 9, Placement & Dimensions Chapter 8, Specifications , providing the BIOS options setting.BIOS ConsoleChapter 7, describes setup procedures including information on the utility diskette., InstallationChapter 6, describes the features of network and the connector.Ethernet Controller,Chapter 5, LCD display. , describes how to adjust the jumper, and the connectors setting.Setting Up the SystemChapter 3, describes the major structure.System ControllerChapter 2, , provides an overview of the system features and packing list.OverviewChapter 1, This information for users covers the following topics (see the Table of Contents for a detailed listing): ORGANIZATION s GuideAR-B1564 User ¡¦ 1. OVERVIEW l l l 1.1 Built to unleash the total potential of the Pentium Processor, the AR-B1564 is all-in-one single boards computer capable of handling today’s demanding requirements. Able to support 75-333 MHz CPU’s, This unit supports 10/100M MII interface network port, a PCI and no-stack through PC/104 expansion bus, synchronous pipe line burst SRAM 512KB, DiskOnChip (DOC), and a 2MB PCI-VGA controller that can support both LCD’s and CRT’s Each AR-B1564 has four ports for I/O communications. One RS-232C/422/485 and three RS-232C ports are available. One port is at TTL level for even greater performance. There is also a watchdog timer that can be configured from software to automatically reset the system or generate an interrupt if there is a system’s or EMI A PC/104 bus is provided for system expansion. The AR-B1564 can support up to six modules which allows tremendous flexibility for the most demanding applications. And for easy configuration, AMI and Award BIOS are Power management is also featured to lower the rate of consumption. The unit supports doze mode, and as well as it adheres to the available. problem. simultaneously or independently. INTRODUCTION Features Packing List Introduction This chapter provides an overview of your system features and capabilities. The following topics are covered: s GuideAR-B1564 User ¡¦ 1.3 l l l l l l l l l l l l l l l l l l 1-2 Dimensions : 146mmX203mm Multi-layer PCB for noise reduction Built-in status LEDs indicator Flash BIOS Programmable watchdog timer Supports DiskOnChip PC/AT compatible keyboard and PS/2 mouse interface Supports 4 serial ports (RS-232C, RS-422, RS-485 and TTL level) Supports 1 bi-directional parallel port Supports floppy disk drives Supports IDE hard disk drives PC/104 extension bus 100M/10Mbps Ethernet with 7-pin JST connector for 100BASE2 On-board CRT and LCD panel display Up to 512KB PBSRAM L2 cache system Up to 128MB DRAM system Supports from 75MHz to 333MHz Pentium CPUs Disk size all-in-one Pentium grade single board computer expansion capabilities, as well as its hardware structure. The system provides a number of special features that enhance its reliability, ensure its availability, and improve its FEATURES s GuideAR-B1564 User ¡¦ 2. l l l l l 2.1 DMA CONTROLLER The equivalent of two 8237A DMA controllers are implemented in the AR-B1564 board. Each controller is a four- channel DMA device which will generate the memory addresses and control signals necessary to transfer information directly between a transfer with less 2-1 2.2 The 8042 processor is programmed to support the serial keyboard and PS/2 mouse interface. The keyboard controller receives serial data from the keyboard, checks its parity, translates scan codes, and presents it to the Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full” 2-1 When using the PS/2 mouse interface, it will save 1 COM port. But it will also occupy IRQ12 interrupt level. interrupt may be used for both send and receive routines. Data can be written to the keyboard by writing data to the output buffer of the keyboard controller. buffer, or wait for the system to poll its status register to determine when data is available. system as a byte data in its output buffer. The controller can interrupt the system when data is placed in its output KEYBOARD CONTROLLER AND PS/2 MOUSE DMA Channel ControllerTable Channel 7: SpareChannel 3: Spare Channel 6: SpareChannel 2: Diskette adapter Channel 5: SpareChannel 1: IBM SDLC Channel 4: Cascade for controller 1Channel 0: Spare DMA Controller 2DMA Controller 1 Following is the system information of DMA channels: the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility. 8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for transfers to peripheral device and memory. This allows high speed information Parallel Port Serial Port Interrupt Controller Keyboard Controller and PS/2 Mouse DMA Controller This chapter describes the major structure of the AR-B1564 CPU board. The following topics are covered: SYSTEM CONTROLLER s GuideAR-B1564 User ¡¦ 2.3 INTERRUPT CONTROLLER CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service 2-1 2-2 Interrupt ControllerFigure Following is the system information of interrupt levels: routine to execute. accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1564 board. They s GuideAR-B1564 User IRQ9 : Rerouting to INT 0Ah from hardware IRQ2IRQ10 : USB (Ref. section Advanced Chipset Setup) ¡¦ 2.3.1 I/O Port Address Map 2-2 2-3 I/O Port Address MapTable Serial port 1 (COM 1)3F8-3FF Diskette controller3F0-3F7 Serial port 3 (COM 3)3E8-3EF Color/graphics monitor adapter3D0-3DF EGA/VGA adapter3C0-3CF Monochrome display and printer port 3 (LPT 3)3B0-3BF Bisynchronous3A0-3AF Sound388-38B Parallel printer port 1 (LPT 1)378-37F Sound300-305 Serial port 2 (COM 2)2F8-2FF Serial port 4 (COM 4)2E8-2EF Parallel printer port 2 (LPT 2)278-27F Sound220-22F EMS register 1218-21A Watchdog214-215 EMS register 0208-20A Game port201 Fixed disk 01F0-1F8 Fixed disk 1170-178 Math Co-processor0F8-0FF Reset Math Co-processor0F1 Clear Math Co-processor0F0 DMA controller 20C0-0DF Interrupt controller 20A0-0A1 DMA page registers080-09F Watchdog076-077 Real-time clock (RTC), non-maskable interrupt (NMI)070-071 8042 keyboard/controller060-06F Timer 2050-05F Timer 1040-04F SiS 5582 chipset address022-023 Interrupt controller 1020-021 DMA controller 1000-01F DeviceHex Range s GuideAR-B1564 User ¡¦ 2.3.2 Real-Time Clock and Non-Volatile RAM The AR-B1564 contains a real-time clock compartment that maintains the date and time in addition to storing configuration information about the computer system. It contains 14 bytes of clock and control registers and 114 maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM 2-3 2.3.3 2-4 Application programs can load different counts into this timer to generate various sound frequencies. This timer provides the speaker tone.Timer 2 This timer is used to trigger memory refresh cycles.Timer 1 The output of this timer is tied to interrupt request 0. (IRQ 0)Timer 0 The AR-B1564 provides three programmable timers, each with a timing frequency of 1.19 MHz. Timer Real-Time Clock & Non-Volatile RAMTable Reserved for system BIOS34-7F Information flags (set during power on)33 Date century byte32 High actual expansion memory byte31 Low actual expansion memory byte30 2-byte CMOS checksum2E-2F Reserved19-2D High expansion memory byte18 Low expansion memory byte17 High base memory byte16 Low base memory byte15 Equipment byte14 Reserved13 Fixed disk type byte, drive D12 Fixed disk type byte, drive C11 Diskette drive type byte, drive A and B10 Shutdown status byte0F Diagnostic status byte0E Status register D0D Status register C0C Status register B0B Status register A0A Year09 Month08 Date of month07 Day of week06 Hour alarm05 Hours04 Minute alarm03 Minutes02 Second alarm01 Seconds00 DescriptionAddress are listed as follows: bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be s GuideAR-B1564 User ¡¦ 2.4 SERIAL PORT The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and MODEM control capability, and a processor interrupt system that may be software tailored to the computing time 0 0 X X X X X X 1 1 2-4 “0” 2-5 Bit 7: Must be 0 Bit 6: Must be 0 Bit 5: Must be 0 Bit 4: Must be 0 Bit 3: Must be 0 Bit 2: Interrupt ID Bit 1 Bit 1: Interrupt ID Bit 0 if Interrupt PendingBit 0: (4) Interrupt Identification Register (IIR) Bit 7: Must be 0 Bit 6: Must be 0 Bit 5: Must be 0 Bit 4: Must be 0 Bit 3: Enable MODEM Status Interrupt (EDSSI) Bit 2: Enable Receiver Line Status Interrupt (ELSI) Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI) Bit 0: Enable Received Data Available Interrupt (ERBFI) (3) Interrupt Enable Register (IER) Bit 0-7: Transmitter holding data byte (Write Only) (2) Transmitter Holding Register (THR) Bit 0-7: Received data byte (Read Only) (1) Receiver Buffer Register (RBR) ACE Accessible RegistersTable Divisor latch (most significant byte)base + 1 Divisor latch (least significant byte)base + 0 Scratched registerbase + 7 MODEM statusbase + 6 Line statusbase + 5 MODEM controlbase + 4 Line controlbase + 3 Interrupt identification (read only)base + 2 Interrupt enablebase + 1 Transmitter holding register (write) Receiver buffer (read)base + 0 RegisterPort AddressDLAB The following table is summary of each ACE accessible register required handle the communications link. Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed produce a 16x clock for driving the internal transmitter logic. s GuideAR-B1564 User ¡¦ 005 Bits 016 Bits 107 Bits 118 Bits 2-6 Bit 7: Received Line Signal Detect (RSLD) Bit 6: Ring Indicator (RI) Bit 5: Data Set Ready (DSR) Bit 4: Clear to Send (CTS) Bit 3: Delta Receive Line Signal Detect (DSLSD) Bit 2: Training Edge Ring Indicator (TERI) Bit 1: Delta Data Set Ready (DDSR) Bit 0: Delta Clear to Send (DCTS) (8) MODEM Status Register (MSR) Bit 7: Must be 0 Bit 6: Transmitter Shift Register Empty (TSRE) Bit 5: Transmitter Holding Register Empty (THRE) Bit 4: Break Interrupt (BI) Bit 3: Framing Error (FE) Bit 2: Parity Error (PE) Bit 1: Overrun Error (OR) Bit 0: Data Ready (DR) (7) Line Status Register (LSR) Bit 7: Must be 0 Bit 6: Must be 0 Bit 5: Must be 0 Bit 4: Loop Bit 3: Out 2 (OUT 2) Bit 2: Out 1 (OUT 1) Bit 1: Request to Send (RTS) Bit 0: Data Terminal Ready (DTR) (6) MODEM Control Register (MCR) Bit 7: Divisor Latch Access Bit (DLAB) Bit 6: Set Break Bit 5: Stick Parity Bit 4: Even Parity Select (EPS) Bit 3: Parity Enable (PEN) Bit 2: Number of Stop Bit (STB) Word LengthWLS0WLS1 Bit 1: Word Length Select Bit 1 (WLS1) Bit 0: Word Length Select Bit 0 (WLS0) (5) Line Control Register (LCR) s GuideAR-B1564 User ¡¦ MS Bit 0Bit 8 Bit 1Bit 9 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 8 6 4 3 2 1 2-5 2.5 PARALLEL PORT 2-6’ The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel ’ 2-7 the Data Swapper address. s Data Latch through the Data Swapper by readingThe system microprocessor can read the contents of the printer (3) Data Swapper data at standard TTL level. (2) Printer Interface Logic Address RegistersTable Printer control latchWritebase + 2 Printer status bufferReadbase + 1 Input dataReadbase + 0 Output dataWritebase + 0 RegisterRead/WritePort Address (1) Register Address Serial Port Divisor LatchTable 115200 57600 38400 28800 19200 14400 129600 244800 323600 482400 641800 961200 192600 384300 Divisor Used to Generate 16x ClockDesired Baud Rate Bit 15Bit 7: Bit 14Bit 6: Bit 13Bit 5: Bit 12Bit 4: Bit 11Bit 3: Bit 10Bit 2: Bit 1: Bit 0: LS (9) Divisor Latch (LS, MS) s GuideAR-B1564 User ¡¦ 2-2 This signal may become active during data entry, when the printer is off-line during printing, or when the print head is changing position or in an error state. When Bit 7 is active, the printer is busy and can not This bit represents the current state of the printer’s ACK signal. A 0 means the printer has received the character and is ready to accept another. Normally, this signal will be active for approximately 5 The system microprocessor can read the contents of the printer control latch by reading the address of printer 2-3’ A 0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present 2-8 for a minimum of 0.5 microseconds before and after the strobe pulse. Bit 0: A 1 causes the printer to line-feed after a line is printed.Bit 1: A 0 starts the printer (50 microseconds pulse, minimum).Bit 2: A 1 in this bit position selects the printer.Bit 3: A 1 in this position allows an interrupt to occur when ACK changes from low state to high state.Bit 4: from external sources to be read; when logic 0, they work as a printer port. This bit is write only. Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data drivenBit 5: X presents not used.NOTE: s Definition BitFigure control swapper. Bit definitions are as follows: (5) Printer Control Latch & Printer Control Swapper A 0 means the printer has encountered an error condition.Bit 3: A 1 means the printer is selected.Bit 4: A 1 means the printer has detected the end of the paper.Bit 5: a BUSY message stops.microseconds before receiving Bit 6: accept data. Bit 7: X presents not used.NOTE: Printer Status BufferFigure definitions are described as follows: The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit (4) Printer Status Buffer s GuideAR-B1564 User 1121814125612121131291126 ¡¦ 3. ’ l l 3.1 3-1 3-1 AR-B1564 PlacementFigure the connector locations and the pin assignment. The AR-B1564 is all-in-one half size, Pentium single CPU board. This section provides hardware jumper settings, OVERVIEW System Setting Overview s external connectors and the jumpers setting.This section describes pin assignments for system SETTING UP THE SYSTEM s GuideAR-B1564 User 522526444310M3M5M6J4CN1CN2CN9U11CN12J1U10BUS1JP3J14JP8JP2 ¡¦ 3.2 (A jumper block is a small plastic-encased conductor that slips over the pins.) the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap 3.2.1 3-2t—RS-422/RS-485 3-3t— Terminator Select 3-2 : Serial Port Selec JP4Figure (B) Terminal Select (JP4) : Serial Port Selec JP4Figure (A) COM-A RS-485/RS-422 Adapter Select (JP4) RS-422/RS-485 Jumper Setting(1) Serial Port permanently damage electronic components. or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can CAUTION: We will show the locations of the AR-B1564 jumper pins, and the factory-default setting. pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins. setting, remove To change a jumper Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks. SYSTEM SETTING s GuideAR-B1564 User ¡¦ 3-4 3-5 3-3 SW2-2 & SW2-3: COM-B RS-232/RS-422 SelectFigure (D) COM-B RS-232C/RS-422 Select (SW2-2 & SW2-3) SW2-1: COM-A RS-232/TTL SelectFigure (C) COM-A RS-232/TTL Select (SW2-1) s GuideAR-B1564 User ¡¦ 3-6 When RS-422 or RS-485 mode is selected, you also need to change JP4 to select between RS-422 or RS-485 1. The recommended configuration for RS-485 interface is to set the transmitter to the controlled by DTR 2. The receiver is always enabled, so you will receive data that you transmitted previously. It is not 3-7 12 34 56 78 9 3-7 3-4 TTL Pin AssignmentTable VCC10GROUND TTLIP3TTLOP3 TTLIP2TTLOP2 TTLIP1TTLOP1 TTLIP0TTLOP0 SignalCN15SignalCN15 CN15: TTL ConnectorFigure (2) TTL I/O Connector (CN15) recommended to use this setting as RS-485 interface. and set the transmitter. Receiver is disabled. NOTE: mode. SW2-2 & SW2-3: RS-485 Mode SelectFigure (E) RS-485 Mode Select (SW2-2 & SW2-3) s GuideAR-B1564 User ¡¦ 3-8 Port 1126 3247 5368 7489 95-- 16 27 38 49 5-- 3-1 3-5 TTL & RS-422/RS-485 Pin AssignmentTable GND20TXD-19 RXD -18TXD+17 (COM B) RXD+16RTS -15 Port 2 CTS -14RTS+13 CTS+12Ground11 VCC10Ground -RI (TTL)-DTR (TTL) (COM A) -CTS (TTL)TXD (TTL) Port 1 -RTS (TTL)RXD (TTL) (TTL)-DSR-DCD (TTL) SignalDB-9CN14SignalDB-9CN14 CN14: TTL & RS-422/RS-485 ConnectorFigure is connected to the TTL, COM B is connected to the RS-422/RS-485. CN14 pin assignments are as follows: Use the enclosed TTL/RS-422/RS-485 adapter cable connecting the CN14, there is two DB-9 serial ports. COM A serial port 2 is set to be RS-422/RS-485 mode. CN14 supports TTL, RS-422, RS-485 pinout of serial port 1 and port 2. The serial port 1 is set to be TTL mode; the (3) TTL & RS-485/RS-422 Connector (CN14) s GuideAR-B1564 User ¡¦ There are 4 serial ports with EIA RS-232C interface on the AR-B1564. To configure these serial ports, use the 3-9 Port 1126 3247 5368 7489 95-- 16 27 38 49 5-- 16 27 38 49 5-- 16 27 38 49 5-- 3-2 “”. 3- 3-6 J5: IrDA Header10Figure (5) IrDA Header (J5) 3) If COM B selected RS-422 or RS-485 mode, please connect to COM B header of CN14. 2) If COM A selected TTL mode, please connect to COM A header of CN14. Not Connect 1) N.C. means NOTE: Pin Assignment RS-232C ConnectorTable VCC D40GROUND D39 -RI D38-DTR D37 (COM D) -CTS D36TXD D35 Port 4 -RTS D34RXD D33 -DSR D32-DCD D31 VCC C30GROUND C29 -RI C28-DTR C27 (COM C) -CTS C26TXD C25 Port 3 -RTS C24RXD C23 -DSR C22-DCD C21 VCC B20GROUND B19 -RI B18-DTR B17 (COM B) -CTS B16TXD B15 Port 2 -RTS B14RXD B13 -DSR B12-DCD B11 VCC A10GROUND A -RI A-DTR A (COM A) -CTS ATXD A Port 1 -RTS ARXD A -DSR A-DCD A SignalDB-9CN3SignalDB-9CN3 CN3: RS-232C ConnectorFigure The pin assignments of the CN3 for serial port A, B, C, & D are as follows: To use the enclosed RS-232 interface cable connecting the CN3, there are four DB-9 serial ports. BIOS Setup program to do well. (4) RS-232C Connector (CN3) s GuideAR-B1564 User ¡¦ 3.2.2 Hard Disk (IDE) Connector A 40-pin header type connector (CN4) is provided to interface with up to two embedded hard disk drives (IDE AT “” To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates e’ 3- 3- 3-7 CN6: Hard Disk (IDE) Connector12Figure AR-B1564 also provides IDE interface 44-pin connector to connect with the hard disk device. (2) 44-Pin Hard Disk (IDE) Connector (CN6) CN4: Hard Disk (IDE) Connector11Figure s 40-pin connector.the pin assignments of the hard disk driv fashion.daisy chainbus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a (1) 40-Pin Hard Disk (IDE) Connector (CN4) s GuideAR-B1564 User GROUND 19IDEDRQB 21 73 GND ¡¦ 3.2.3 Power Connector J1 is an 8-pin power connector. You can directly connect the power supply to the onboard power connector for 3- 3- 3.2.4 FDD Port Connector (CN7) 3- 3-8 CN7: FDD Port Connector15Figure To enable or disable the floppy disk controller, please use BIOS Setup program to select. The AR-B1564 provides a 34-pin header type connector for supporting up to two floppy disk drives. CN5: 4-Pin Power Connector14Figure (2) 4-Pin Power Connector (CN5) J1: 8-Pin Power Connector13Figure stand-alone applications. (1) 8-Pin Power Connector (J1) s GuideAR-B1564 User ¡¦ 3.2.5 Parallel Port Connector (CN8) To use the parallel port, an adapter cable has been connected to the CN8 (26-pin header type) connector. This 3- 112 324 536 748 95 6 7 8 9 -- 3-3 3-9 Parallel Port Pin AssignmentTable No Connect26Printer Select1325 Ground2524Paper1223 Ground2422Busy1121 Ground2320-Acknowledge1019 Ground2218Data 717 Ground2116Data 615 Ground2014Data 513 Ground1912Data 411 Ground1810Data 3 -Printer Select In17Data 2 -Initialize16Data 1 -Error15Data 0 -Auto Form Feed14-Strobe SignalDB-25CN8SignalDB-25CN8 CN8: Parallel Port Connector16Figure connector. adapter cable is included in your AR-B1564 package. The connector for the parallel port is a 25-pin D-type female s GuideAR-B1564 User ¡¦ 3.2.6 PC/104 Connector 3- 3- 3-10 CN11: 40-Pin PC/104 Connector Bus C & D18Figure (2) 40-Pin PC/104 Connector Bus C & D (CN11) CN10: 64-Pin PC/104 Connector Bus A & B17Figure (1) 64-Pin PC/104 Connector Bus A & B (CN10) s GuideAR-B1564 User A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15 ¡¦ BUSCLK [Output]The BUSCLK signal of the I/O channel is asynchronous to the CPU clock. RSTDRV [Output]This signal goes high during power-up, low line-voltage or hardware reset SA0 - SA19The System Address lines run from bit 0 to 19. They are [Input / Output]latched onto the falling edge of "BALE" LA17 - LA23The Unlatched Address line run from bit 17 to 23 [Input/Output] SD0 - SD15System Data bit 0 to 15 [Input/Output] BALE [Output]The Buffered Address Latch Enable is used to latch SA0 – SA19 onto the falling edge. This signal is forced high during DMA cycles -IOCHCK [Input]The I/O Channel Check is an active low signal which indicates that a parity error exist on the I/O board IOCHRDYThis signal lengthens the I/O, or memory read/write cycle, and should be held low with a valid address The Interrupt Request signal indicates I/O service request [Input]attention. They are prioritized in the following sequence : (Highest) IRQ 9, 10, 11, 12, 13, 15, 3, 4, 5, 6, 7 (Lowest) -IORThe I/O Read signal is an active low signal which [Input/Output]instructs the I/O device to drive its data onto the data bus -IOW [Input/Output]The I/O write signal is an active low signal which instructs the I/O device to read data from the data bus -SMEMRThe System Memory Read is low while any of the low 1mega bytes of memory are being used -MEMRThe Memory Read signal is low while any memory [Input/Output]location is being read -SMEMWThe System Memory Write is low while any of the low 1mega bytes of memory is being written -MEMWThe Memory Write signal is low while any memory [Input/Output]location is being written DRQ 0-3, 5-7 [Input]DMA Request channels 0 to 3 are for 8-bit data transfers. DMA Request channels 5 to 7 are for 16-bit data transfers. DMA request should be held high until the corresponding DMA has been completed. DMA request priority is in the following sequence:(Highest) DRQ 0, 1, 2, 3, 5, 6, 7 (Lowest) -DACK 0-3, 5-7The DMA Acknowledges 0 to 3, 5 to 7 are the [Output]corresponding acknowledge signals for DRQ 0 to 3 and 5 to 7 AEN [output]The DMA Address Enable is high when the DMA controller is driving the address bus. It is low when the CPU is driving the address bus -REFRESHThis signal is used to indicate a memory refresh cycle [Input/Output]and can be driven by the microprocessor on the I/O channel TCTerminal Count provides a pulse when the terminal count for any DMA channel is reached SBHE [Input/Output]The System Bus High Enable indicates the high byte SD8 - SD15 on the data bus 3-11 [Output] [Output] [Output] IRQ 3-7, 9-12, 14, 15 [Input, Open collector] DescriptionName (3) PC/104 ISA Bus Signal Description s GuideAR-B1564 User ¡¦ -MASTER [Input]The MASTER is the signal from the I/O processor which gains control as the master and should be held low for a maximum of 15 microseconds or system memory may be lost due to the lack of refresh -MEMCS16The Memory Chip Select 16 indicates that the present data transfer is a 1-wait state, 16-bit data memory operation -IOCS16The I/O Chip Select 16 indicates that the present data transfer is a 1-wait state, 16-bit data I/O operation [Output]The Oscillator is a 14.31818 MHz signal -ZWSThe Zero Wait State indicates to the microprocessor that the present bus cycle can be completed without inserting additional wait cycle 3-4 3.2.7 CPU Setting The AR-B1564 accepts many types of 586 microprocessor, such as INTEL Pentium, AMD-K5, AMD-K6, and CYRIX 6x86. All of these CPUs include an integer processing unit, floating-point processing unit, memory- management unit, and cache. They can give a two to en-fold performance improvement in speed over the 486 processor, depending on the clock speeds used and specific application. Like the 486 processor, the 586 processor includes both segment-based and page-based memory protection schemes. Instruct processing time has reduced by on-chip instruction pipelining. By performing fast, on-chip memory management and caching, the 3- OFFONOFFOFFOFF-- ONONOFFOFFOFF-- ONOFFOFFONOFF-- OFFONOFFONOFF-- OFFONONONOFF-- ONONONONOFF-- 3-5 3- 3-12 SW1: CPU Clock Multiplier20Figure (2) System Base Clock & CPU Clock Multiplier (SW1) SW3: CPU Logic Core Voltage Table Setting F Setting E Setting D Setting C Setting B Setting A VoltageSW3-6SW3-5SW3-4SW3-3SW3-2SW3-1 SW3: CPU Logic Core Voltage19Figure (1) CPU Logic Core Voltage Select (SW3) 586 processor relaxes requirements for memory response for a given level of system performance. PC/104 ISA Bus Pin AssignmentTable [Input, Open collector] OSC [Input, Open collector] [Input, Open collector] DescriptionName s GuideAR-B1564 User ¡¦ ONONOFF OFFONOFF ONOFFOFF OFFOFFOFF ONONON-- OFFONON-- ONOFFON-- OFFOFFON-- 3-6 ONONOFF50MHz25MHz OFFONOFF ONOFFOFF60MHz30MHz OFFOFFOFF55MHz ONONON OFFONON ONOFFON OFFOFFON75MHz 3-7 1.– 2.– 3- 3-13 JP2: P54C/P55C CPU Type Select21Figure (3) P54C/P55C CPU Type Select (JP2) 233 is factory default setting.Intel CPU MMX BF0-BF2: On presents Low, Off presents High.SW1 jumper setting NOTE: SW1: CPU Clock Multiplier Table 37.5MHz 30.8MHz61.6MHz 34.2MHz68.4MHz 25.6MHz51.3MHz 27.5MHz 33.3MHz66.6MHz PCI ClockBase ClockSW1-6SW1-5SW1-4 The CPU input clock is twice the operation clock. This board supports different types of CPUs. The clock generator needs to be set by SW1. (B) CPU Base Clock Select (SW1) SW1: CPU Clock Multiplier Table 5.5X 4.0X 5.0X 4.5X 3.5X1.5X 2.0X2.0X 3.0X3.0X 2.5X2.5X P55CP54CSW1-3SW1-2SW1-1 The CPU clock multiplier needs to be set by SW1. (A) CPU Clock Multiplier Select (SW1) s GuideAR-B1564 User ¡¦ CPU Type Pentium - 7575MHzOffOffOffSetting E Pentium - 9090MHzOffOffOffSetting E Pentium - 100100MHzOffOffOffSetting E Pentium - 120120MHzOffOffSetting E Pentium - 133133MHzOffOffSetting E Pentium - 150150MHzOffSetting E Pentium - 166166MHzOffSetting E Pentium - 200200MHzOffOffSetting E 166MHzOffSetting C 200MHzOffOffSetting C 233MHzOffOffOffSetting C 3-8 CPU TypeWork Frequency Clock 75MHz OffOffOff 90MHz OffOffOff 100MHz OffOffOff 90MHz OffOff 100MHz OffOff 116.7MHz Off 75MHzSetting E OffOffOff 90MHzSetting E OffOffOff 100MHzSetting E OffOffOff 90MHzSetting E OffOff 100MHzSetting E OffOff 116.7MHzSetting E Off 166MHzSetting D Off 200MHzOffOffSetting D 233MHzSetting E OffOffOff K6-2-300300MHzSetting B K6-2-333333MHzSetting B Off 3-9 CPU TypeWork Frequency 80MHzSetting E OffOff 100MHzSetting E OffOff 110MHzSetting E OffOff 120MHzSetting E OffOff 133MHzSetting E OffOff 150MHzSetting E OffOff 100MHzSetting C OffOff 110MHzSetting C OffOff 120MHzSetting C OffOff 133MHzSetting C OffOff 150MHzSetting C OffOff 2.5/2.0XSetting D Off 2.5/2.0XSetting D Off 2.5/3.0XSetting D Off 233MHzSetting D OffOffOff 3- 3-14 Cyrix CPU Base Clock Setting10 Table 3.5X66.7MHz6X86-PR300 (MMX) OnOff/On75//66.7MHz187.5/200MHz6X86-PR233 (MMX) Off/On On66.7/75MHz166/150MHz6X86-PR200 (MMX) On/OffOn60/66.7MHz150/133MHz6X86-PR166 (MMX) On2.0X75.0MHz6X86L-PR200 On2.0X66.7MHz6X86L-PR166 On2.0X60.0MHz6X86L-PR150 On2.0X55.0MHz6X86L-PR133 On2.0X50.0MHz6X86L-PR120 On2.0X75.0MHz6X86-PR200 On2.0X66.7MHz6X86-PR166 On2.0X60.0MHz6X86-PR150 On2.0X55.0MHz6X86-PR133 On2.0X50.0MHz6X86-PR120 On2.0X40.0MHz6X86-PR100 Multiplier BF2BF1BF0Clock SW1-3SW1-2SW1-1 SW3SW1 Cyrix CPU AMD CPU Base Clock Setting Table OnOn 5.0X66.7MHz OnOnOn 4.5X66.7MHz 3.5X66.7MHzK6-233 (MMX)(ANR) On3.0X66.7MHzK6-200 (MMX)(ANR) OnOn2.5X66.7MHzK6-166 (MMX)(ANR) OnOn1.75X66.7MHzK5-PR166 (AFR) On1.5X66.7MHzK5-PR133 (AFR) On1.5X60.0MHzK5-PR120 (AFR) 1.5X66.7MHzK5-PR100 (AFR) 1.5X60.0MHzK5-PR90 (AFR) 1.5X50.0MHzK5-PR75 (AFR) Setting FOnOn1.75X66.7MHzK5-PR166 (ABR) Setting FOn1.5X66.7MHzK5-PR133 (ABR) Setting FOn1.5X60.0MHzK5-PR120 (ABR) Setting F1.5X66.7MHzK5-PR100 (ABR) Setting F1.5X60.0MHzK5-PR90 (ABR) Setting F1.5X50.0MHzK5-PR75 (ABR) BF2BF1BF0Multiplier SW1-3SW1-2SW1-1 SW3SW1 AMD CPU Intel CPU Base Clock Setting Table 3.5X66.7MHzMMX-233 On3.0X66.7MHzMMX-200 OnOn2.5X66.7MHzMMX-166 On3.0X66.7MHz OnOn2.5X66.7MHz OnOn2.5X60.0MHz On2.0X66.7MHz On2.0X60.0MHz 1.5X66.7MHz 1.5X60.0MHz 1.5X50.0MHz BF2BF1BF0MultiplierClockFrequency SW3 SW1-3SW1-2SW1-1SW1Work Intel CPU s GuideAR-B1564 User ¡¦ CPU TypeWork Frequency 180MHz OffOff 200MHz OffOff 225MHz OffOff 240MHzOff 3- 1.– 2. 3- 3-15 J14: CPU Cooling Fan Power Connector CN1 & 22Figure (4) CPU Cooling Fan Power Connector (CN1 & J14) Intel CPU MMX - 233 is factory default setting. BF0-BF2: On presents Low, Off presents High.SW1 jumper setting NOTE: IDT Winchip CPU Base Clock Setting11 Table OnOn Setting F4.0X60.0MHzIDT C6-240 Setting FOn3.0X75.0MHzIDT C6-225 Setting FOn3.0X66.7MHzIDT C6-200 Setting FOn3.0X60.0MHzIDT C6-180 Multiplier BF2BF1BF0Clock SW1-3SW1-2SW1-1 SW3SW1 IDT Winchip CPU s GuideAR-B1564 User 52 LED- ¡¦ 3.2.8 Memory Setting Memory Modules) which is designed to accommodate 256KX36 bit to 16MX36-bit SIMMs. This provides the user with up to 128MB of main memory. The 32-bit SIMM (without parity bit) also can be used on AR-B1564 board. 3- 3.2.9 LED Header 3- 3- 3- 3-16 J9: Watchdog LED Header25Figure (3) Watchdog LED Header (J9) J11: HDD LED Header24Figure (2) HDD LED Header (J11) J8: Power LED & Key Lock Header23Figure (1) External Power LED & Keyboard Lock Header (J8) DRAM Configuration12Table 128MB16MX32(X36)16MX32(X36) 64MBNone16MX32(X36) 64MB8MX32(X36)8MX32(X36) 32MBNone8MX32(X36) 32MB4MX32(X36)4MX32(X36) 16MBNone4MX32(X36) 16MB2MX32(X36)2MX32(X36) 8MBNone2MX32(X36) 8MB1MX32(X36)1MX32(X36) 4MBNone1MX32(X36) 4MB512KX32(X36)512KX32(X36) 2MBNone512KX32(X36) 2MB256KX32(X36)256KX32(X36) 1MBNone256KX32(X36) Total MemorySIMM1SIMM2 Please refer to the following table for details: There are two 32-bit memory banks on the AR-B1564 board. It can be one-side or double-side SIMM (Single-Line s GuideAR-B1564 User ¡¦ 3.2.10 PS/2 Mouse ’t use the PS/2 mouse and will share the IRQ12 for other peripheral using, user can select 3- To use the PS/2, an adapter cable has to be connected to the J7 (6-pin header type) connector. This adapter 3- 3.2.11 Keyboard Connector (J6) An PC/AT compatible keyboard can be used by connecting the provided adapter cable between J6 and the 3- 3-17 J6: Keyboard Connector28Figure keyboard. The pin assignments of J6 connector are as follows: J7: PS/2 Mouse Connector27Figure Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows: cable is mounted on a bracket and is included in your AR-B1564 package. The connector for the PS/2 mouse is a (2) PS/2 Mouse Connector (J7) JP7: PS/2 Mouse IRQ12 Setting26Figure for share this IRQ. DisabledIf user doesn (1) PS/2 Mouse IRQ 12 Setting (JP7) s GuideAR-B1564 User 1 : Speaker+2, 3, 4: Speaker-1 Reset+2 Reset- ¡¦ 3.2.12 External Speaker Header (J4) 3- 3.2.13 Reset Header (J13) 3- 3.2.14 USB Connector (CN2) USB is the abbreviation of Universal Serial Bus. The Universal Serial Bus (USB) standard is a low-to-medium USB is a leading edge technology that allows the user to quickly and easily adding wide range peripheral devices from printers to keyboards and telephony devices to fax/modems. Universal Host Controller Interface (UHCI) and future support for the Open Host Controller Interface (OHCI) ensure USB compatibility and usability well into the The connector on the CPU board supports two Universal Serial Bus ports. An optional external port bracket attaches to the onboard connector via an attached cable. With the optional port bracket installed you can attach USB devices to the external ports. If the USB ports are installed, the USB Controller line in the Integrated Peripherals section of the CMOS Setup utility must be set to “”. USB ports may also require Operating 3- 12 34 56 78 9 3- 3-18 CN2: USB Connector Pin Assignment13Table CASE10CASE GNDGND +DATA+DATA -DATA-DATA VCCVCC DescriptionPinDescriptionPin CN2: USB Connector31Figure System support for USB devices. Enabled future. are physically attached - without the need to reboot or run setup. Personal computers equipped with USB allow computer peripherals to be automatically configured as soon as they The USB standard simplifies the connection of peripherals to PCs with a uniform hardware and software interface. speed interface for the connection of PC peripherals. J13: Reset Header30Figure J13 is used to connect to an external reset switch. Shorting these two pins will reset the system. J4: Speaker Header29Figure Besides the on board buzzer, you can use an external speaker by connecting J4 header directly. s GuideAR-B1564 User ¡¦ 3.2.15 26-Pin Audio Connector 3- 12 34 56 78 9 3- 3.2.16 D.O.C. Memory Address Select (SW2-4) This section provides the information about how to use the D.O.C. (DiskOnChip). There divided two parts: 3- OFF ON 3- 3-19 D.O.C. Memory Address15Table D400 : 0000 Factory PresetD000 : 0000 NoteAddressSW2-4 SW2-4: D.O.C. Memory Address33Figure Line up and insert the AR-B1564 card into any free slot of your computer.Step 3: Insert programmed DiskOnChip into sockets U28 setting as DOC.Step 2: Use SW2 to select the correct D.O.C. memory address.Step 1: hardware setting and software configuration. Audio Connector Pin Assignment14Table GND26GND25 JTMD24-JSWD23 JTMC22-JSWC21 JTMB20-JSWB19 JTMA18-JSWA17 GND16GND15 MIDIOP14MIDIIN13 GND12GND11 PCSPKO10AUDIOR MICPHAUDIOL VJOYS+12V LINERAUXAR LINELAUXAL SignalCN9SignalCN9 CN9: 26-Pin Audio Connector32Figure (CN9) s GuideAR-B1564 User ¡¦ 3.2.17 120-Pin PCI Connector (BUS1) 3- 12 34 56 78 9 -GNT-REQ 3- 3-20 120-Pin PCI Connector Pin Assignment16Table +5V120+5V119+5V60+5V59 -ACK64118+5V117-REQ6458+5V57 AD1116GND115AD056AD255 AD3114AD5113GND54AD453 +3.3V112AD7111AD652+3.3V51 AD8110GND109C/BE050AD949 AD10108AD12107GND48AD1147 GND106AD14105AD1346+3.3V45 C/BE1104+3.3V103AD1544PAR43 -SERR102+3.3V101GND42-SB041 -PERR100-LOCK99SDONE40+3.3V39 GND98-DEVSL97-STOP38GND37 +3.3V96-IRDY95-TRDY36GND35 GND94C/BE293-FRAME34+3.3V33 AD1792+3.3V91AD1632AD1831 AD1990AD2189GND30AD2029 GND88AD2387AD2228+3.3V27 C/BE386+3.3V85IDSEL26AD2425 AD2584AD2783GND24AD2623 GND82AD2981AD2822+3.3V21 AD3180+5V79AD3020NC19 78GND77GND1817 CLK76GND75+5V16-RST15 NC74GND73NC14GND13 GND72-PRST271GND12NC11 NC70-PRST169+5V10NC -INTD68-INTB67+5V-INTC +5V66+5V65-INTA+5V TD064GND63TDITMS TCK62-12V61+12V-TRST SignalBUS1SignalBUS1SignalBUS1SignalBUS1 BUS1: 120-Pin PCI Connector34Figure s GuideAR-B1564 User ¡¦ 4. This chapter describes the configuration and installation procedure using LCD and CRT display. The following l l l 4.1 CRT CONNECTOR (CN13) To connect a CRT monitor, an adapter cable has to be connected to the CN13 (10-pin header type) connector. The AR-B1564 support CRT color monitors. AR-B1564 used onboard VGA chipset and supported 2MB on-board VRAM. For different VGA display modes, your monitor must possess certain characteristics to display the mode To connect to a CRT monitor, an adapter cable has to be connected to the CN13 connector. CN13 is used to CN13 is a 10-pin connector that attaches to the CRT monitor via a HD-sub 15-pin adapter cable. Pin assignments 4-1 1125 3246 5367 788 9 4-1 4-1 CRT Connector AssignmentTable GND1010H-sync13 AGNDV-sync14 AGNDBlue AGNDGreen GNDRed FUNCTIONDB-15CN13FUNCTIONDB-15CN13 CN13: CRT ConnectorFigure for the CN13 & HDB15 connector is as follows: the on-board VGA controller as a display adapter.connect with a VGA monitor when you are using you want. This adapter cable is included in your AR-B1564 package. Supported LCD Panel LCD Flat Panel Display CRT Connector topics are covered: CRT/LCD FLAT PANEL DISPLAY s GuideAR-B1564 User ¡¦ 4.2 This section describes the configuration and installation procedure using LCD display. Skip this section if you are Using the Flash memory Writer utility to download the new BIOS file into the ROM chip to configure the BIOS default setting for different types of LCD panel. And then set your system properly and configure the AR-B1564 Chips & Technologies used by AR-B1564 VGA module can support. If you are using a different LCD panel other 4-1 The block diagram shows that AR-B1564 still needs components to be used for LCD panel. The inverter board 4-2 A wrong connection can easily destroy your LCD panel. The pin 1 of the cable connectors is indicated with a sticker and the pin1 of the The inverter board is the one that supplies the high voltage signals to drive the LCD panel by converting the 12 volt signal from the AR-B1564 into high voltage AC signal for LCD panel. It can be installed freely on the space 4-2 ribbon cable is usually with different color. Be careful with the pin orientation when installing connectors and the cables. NOTE: LCD Panel Cable Installation DiagramFigure the high voltage to drive the LCD panel. Each item will be explained further in the section. provides the control for the brightness and the contrast of the LCD panel while the inverter is the one that supplies LCD Panel Block DiagramFigure The following shows the block diagram of using AR-B1564 for LCD display. than those listed, choose from the panel description column which type of LCD panel you are using. The sample LCD models listed on the table are just some of the LCD panel models available in the market that the VGA module for the right type of LCD panel you are using. using CRT monitor only. LCD FLAT PANEL DISPLAY s GuideAR-B1564 User VBL Control ¡¦ The AR-B1564 supports CRT colored monitor, STN, Dual-Scan, TFT, monochrome and color panels. It can be connected to create a compact video solution for the industrial environment. 2MB of RAM on-boarded allows a maximum CRT resolution of 1024X768 with 64K colors and a LCD resolution of 800X600 with 64K colors. For 4.2.1 LCD Supported Voltage Select (JP8) 4-3 4.2.2 DE/E Signal from M or LP Select (JP3) 4-4 4.2.3 LCD Panel Display Connector (CN12) 4-5 12 34 56 78 9 4-2 4-3 LCD Display Pin AssignmentTable VEE44GND43 ENABLK42DE41 GND40GND39 +12V38+12V37 VCC36VCC35 GND34P2333 P2232P2131 P2030P1929 P1828GND27 P1726P1625 P1524P1423 P1322P1221 GND20P1119 P1018P917 P816P715 P614GND13 P512P411 P310P2 P1P0 GNDFLM LPGND SHFCLKGND SignalPinSignalPin CN12: LCD Display ConnectorFigure Attach a display panel connector to this 44-pin connector with pin assignments as shown below: JP3: DE/E Signal from M or LPFigure JP8: LCD Supported Voltage SelectFigure different VGA display modes, your monitor must possess certain characteristics to display the mode you want. inverter board into your system. provided over the VR board. If the VR board is installed on the bracket, you have to provide a place to install the s GuideAR-B1564 User ¡¦ 4.2.4 Touch Screen Connector (J3) 4-6 4.3 At present, this VGA card can provide the total solution with inverter board for the following list of standard LCD panel. Consult your Acrosser representative for new developments, when using other models of standard LCD NO. 1” 2” 3” 4” 5” 6” 7” 8” 4-1 1. If you want to connect the LCD panel, you must update the AR-B1564’s BIOS, then you can setup 2. If user needs to update the BIOS version or connect other LCD, please contact the sales The detail supported LCDs are listed in the Acrosser Web site, user can download the 4-4 http:\\www.acrosser.com suitable BIOS. The address is as follows: department. the corrected BIOS. Please contact Acrosser for the latest BIOS update. CAUTION: LCD Panel Type ListTable TFT 10.4LQ10D321SHARP DSTN 10.4OGM-640CN03C-SORION DSTN 10.4LMG9400HITACHI DSTN 9.4LMG9200HITACHI Dual ScanMONO 9.4LMG5371HITACHI TFT 10.4NL-6448AC33-10NEC TFT 10.2NL-6448AC32-10NEC TFT 9.4NL-6448AC30-10NEC DescriptionModel No.Manufacture panels in the market. SUPPORTED LCD PANEL J3: Touch Screen ConnectorFigure s GuideAR-B1564 User 2 TXDD 5 ¡¦ 5. l l l 5.1 The Ethernet controller of the AR-B1564 is a highly integrated design that supports the Media Independent Interface (MII) network interface with the IEEE 802.3 standard. Network interfaces include 100M local area 5.2 The Ethernet controller chipset provides a number of special features that enhance its reliability, and improve its l l l l l Contains two deeper 2K bytes FIFO for receive and transmit controller both supports bursts of up l l l l l 5.3 NETWORK PORT 5.3.1 Ethernet Connector (J2) 5-1 1 2 3 4 5 6 7 5-1 5-1 Pin Assignment Ethernet ConnectorTable GROUND GROUND GROUND TPRX - TPRX+ TPTX - TPTX+ FUNCTIONPIN (J2) : RJ-45 Connector J2Figure Single +5V supply, 0.5um standard CMOS technology Software controllable power down feature Support external Boot-rom up to 64K bytes no external address latch Support Magic packet and wake on address filtering Support physical, Broadcast, Mulitcast adddress filtering using hashing function to full Ethernet length 10/100MHz full duplex half duplex operation Provides standard 100M bit MII interface High performance PCI mastering structure Single chip Fast Ethernet controller for PCI bus interface expansion capabilities, as well as its hardware structure. FEATURES any external device. networks complies with PCI specification V2.1. The Ethernet controller can interface directly to the PCI bus without OVERVIEW Network Port Features Overview This chapter describes the features of network and the connector. The following topics are covered: ETHERNET CONTROLLER s GuideAR-B1564 User ¡¦ 5.3.2 Network Active LED Header (J10) 5-2 5.3.3 5-3 5-2 J12: Network LED HeaderFigure Network 100Mbps Transferring LED Header (J12) J10: Network Active LED HeaderFigure s GuideAR-B1564 User 1 LED-2 LED+1 LED-2 LED+ ¡¦ 6. l l l 6.1 This chapter provides information for you to set up a working system based on the AR-B1564 CPU card. Please read the details of the CPU card’s hardware descriptions before installation carefully, especially jumper setting, d’ Connect all necessary cables. Make sure that the FDC, HDC, serial and parallel cables are Connect the hard disk/floppy disk flat cables from the CPU board to the drives. Connect a power If the CPU board does not work, turn off the power and read the hardware description carefully If the CPU board still does not perform properly, return the board to your dealer for immediate 6.2 UTILITY DISKETTE AR-B1564 provides three VGA driver diskettes, supports WIN31, WIN95, WINNT3.5, WINNT4.0 and OS/2 WARP There are three VGA diskettes: disk#1 is for WIN31, disk#2 is for WIN95, & OS/2, disk#3 is for WINNT3.5 & WINNT4.0. Disk#4 is for network utility, disk#5 is for audio utility. In disk#1 to disk#4 the compressed files are auto-extracted. In the disk#5 utility directory attached the extract program -- PKUNZIP.EXE, to extract the files in the audio directory, including the README.TXT file in the compress file. Please refer to the file for any 6-1 troubleshooting before install the driver. 3.0. service. Step 12: again. Step 11: Configure your system with the BIOS Setup program then re-boot your system.Step 10: Turn on the power.Step 9 : Plug the keyboard into the keyboard connector.Step 8 : source to each drive. Step 7 : connected to pin 1 of the related connector. Step 6 : a screw to the system chassis. Plug the CPU card into a free AT-bus slot or PICMG slot on the backplane and secure it in place withStep 5 : Make sure that the power supply connected to your passive CPU board is turned off.Step 4 : Set jumpers.Step 3 : Install any DRAM SIMM onto the CPU card.Step 2 : s hardware description in this manual.Read the CPU boarStep 1 : Follow steps listed below for proper installation: switch settings and cable connections. OVERVIEW Watchdog Timer Utility Diskette Overview This chapter describes the procedure of the installation. The following topics are covered: INSTALLATION s GuideAR-B1564 User ¡¦ 6.2.1 For the WIN31 operation system, user must in the DOS mode decompress the compress file. And then as to the C:\>MD VGAW31 C:\>CD VGAW31 Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—WIN31DRV.EXE in C:\VGAW31>COPY A:\WIN31DRV C:\VGAW31 C:\VGAW31>WIN31DRV C:\VGAW31>SETUP Please choose the , press [ENTER] to select MD VGAW95 C:\>CD VGAW95 Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file—WIN95DRV.EXE in C:\VGAW95>COPY A:\WIN95DRV C:\VGAW95 C:\VGAW95>WIN95DRV In the WIN95 operating system, please choose the item of the icon in the ’ Finally, find the icon and the item. You can select this item, and adjust the , , …and other functions. Please refer to the you can find the README file, it describes detailed 6-2 installation information. If you decompress files in the newly created directory, CAUTION: messages during installation. Step 5: Find the item, select and click the button.Step 4: C:\VGAW95 path.{CONTROL PANEL}. Please select the item, and type the factory source files Step 3: .EXE the new created directory, and extract the compress file. Step 2: Make the new created directory to put the VGA drivers. Change directory to the new created directoryStep 1: by step: For the WIN95 operation system, user must decompress the compress file in the DOS mode. And then setup step (2) WIN 95 Driver Adjust the , , , , and .Step 10: In WIN31, you can find the icon located in the {CONTROL PANEL} group.Step 9: Press [Esc] to return the main menu, and press [Esc] to return to the DOS mode.Step 8: s Guide to complete the installation.the new drivers marked by an *. Please refer to the Use Change to your Windows directory and type SETUP to run the Windows Setup program. Choose one of Installation is done! following. Step 7: user for the WIN31 path. The default is C:\WINDOWS.The screen will show the dialog box to prompt the Step 6: Resolutions>. When this line appears [*], that means this item is selected. Press [End] to install. Step 5: The screen shows the chip type, and presses any key enter the main menu.Step 4: In WIN31 mode execute the SETUP.BAT file. It generates the SETUP MENU.Step 3: .EXE the new created directory, and extract the compress file. Step 2: Make the new created directory to put the VGA drivers. Change directory to the new created directoryStep 1: steps: (1) WIN 3.1 Driver VGA Driver s GuideAR-B1564 User ¡¦ C:\>MD VGANTXX C:\>CD VGANTXX e—NTXXDRV.EXE in the C:\VGANTXX>COPY A:\NTXXDRV C:\VGANTXX C:\VGANTXX>NTXXDRV In the WINNTXX operating system, choose the item of the icon in the ’ C:\VGANTXX Find the item, select it and click the Find the item in the icon. You can select this item, and adjust the , , …and other function. Please refer to the messages during b) Reset the system to VGA mode. VGA is the default video mode enabled when OS/2 is installed. To restore VGA mode, use Selective Install and select VGA for Primary Display. For more information on this procedure, see the section on Changing Display Adapter Support in C:\>MD VGAOS2 C:\>CD VGAOS2 C:\VGAOS2>COPY A:\OS2DRV.EXE C:\VGAOS2>OS2DRV Please refer to the README.TXT file. When the installation to completed, adjust the VGA resolution in 6-3 the SYSTEM icon item of the . Step 7: in order for changes to take effect. Step 6: When the Setup Program is completed, you will need to perform a shutdown and then restart the system C:\VGAOS2> SETUP C:\VGAOS2 C: Step 5: At the OS/2 command prompt, type the following commands to copy the files to the OS/2 drive: Step 4: In the OS/2-DOS mode, make a VGA directory for decompressing the driver. Step 3: Because the diskette enclosed a compressed file, extract it with the following steps. Step 2: Place the 65550 PCI Display Driver Diskette in drive A. (DISK #2) Step 1: Open an OS/2 full screen or windowed session. To install this driver, do the following steps: the OS/2 Users Guide. a) Close all DOS Full Screen and WIN-OS2 sessions. 2. If you previously installed SVGA support, you must do the following: CAUTION: 1. OS/2 DOS Support must be installed. The following steps must be performed before you install the 65550 display driver: (4) OS/2 Warp 3.0 Driver installation. Step 6: button. Step 5: path.{CONTROL PANEL}. Please select the item, and type the factory source files Step 4: .EXE new created directory, and extract the compress file. Step 2: Insert the Utility Disk #3 in the floppy disk drive, and then copy the compress fil Step 1: Make the new created directory to put the VGA drivers. Change directory to the new created directory And then setup step by step: For the WINNT3.5 & WINNT4.0 operating system, the user must decompress the compressed files in DOS mode. (3) WINNT Driver s GuideAR-B1564 User ¡¦ 6.2.2 Network Utility 1. C:\>MD NET C:\>CD NET Insert the Utility Disk #4 in the floppy disk drive, and then copy the compressed file—LAN.EXE in the new 2. C:\NET>COPY A:\NET C:\NET C:\NET>NET 3. 6.2.3 Audio Driver For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the C:\>MD AUW31 Insert the Utility Disk #5 in the floppy disk drive, and then copy the compress file—WIN31DRV.ZIP, m— C:\>COPY A:\ C:\AUW31 C:\>COPY A:\UTILITY\PKUNZIP.EXE C:\AUW31 C:\>CD AUW31 C:\AUW31>PKUNZIP -d There are some items for choice to setup. Please choose the item, notice the Completed the installation, user will find two drivers: and PKUNZIP -d WIN95DRV.ZIP C:\>CD AUW95 Step 3: Change directory to the new created directory, and extract the compress file. C:\>COPY A:\UTILITY\PKUNZIP.EXE C:\AUW95 C:\>COPY A:\AUDIO\WIN95DRV.ZIP C:\AUW95 PKUNZIP.EXE, in the new created directory.and the extract progra Step 2: C:\>MD AUW95 Step 1: Make the new created directory to put the audio drivers. steps: (2) WIN 95 Driver AudioDrive MPU-401 4.17.08>. Step 7: function key defined. And then the screen shows the hardware setting, press [OK] starts to install. Step 6: The screen shows the chip type, and presses any key enter the main menu.Step 5: In the FILE MANAGER ICON execute the SETUP.EXE file.Step 4: WIN31DRV.ZIP Step 3: Change directory to the new created directory, and extract the compress file. AUDIO\WIN31DRV.ZIP PKUNZIP.EXE, in the new created directory.and the extract progra Step 2: Step 1: Make the new created directory to put the audio drivers. steps: (1) WIN 3.1 Driver There is the README file in every sub-directory, and has detail description for using the drivers. And then enter the operation system, as the installation steps process. Please refer to the decompressed file. .EXE created directory, and extract the compressed file. Make the new created directory to put the nwtwork drivers. Change directory to the new created directory The forth diskette provides network function for user application. The file is LAN.EXE. s GuideAR-B1564 User ¡¦ In the WIN95 operation system, please choose the icon in the {CONTROL PANEL}. Please select the item, and type the factory source files’ And then you can find the item, select it and click the For the WINNT4.0 and WINNT3.5 operating system, user must in the DOS mode decompress the compress file. Insert the Utility Disk #4 in the floppy disk drive, and then copy the compress file—NT40DRV.ZIP, m— In the WINNT4.0 operation system, please choose the icon in the {CONTROL PANEL}. Please select the item, and type the factory source files’ And then you can find the item, select it and click the C:\>MD AUDOS Insert the Utility Disk #4 in the floppy disk drive, and then copy the compress file—DOSDRV.ZIP, m— C:\>COPY A:\AUDIO\ C:\AUDOS C:\>COPY A:\UTILITY\PKUNZIP.EXE C:\AUDOS C:\>CD AUDOS C:\AUDOS>PKUNZIP -d DOSDRV The screen shows the hardware configuration items for setup the base address, IRQ, DMA…etc. If these items setting all are correct. The setup will ask the directory to install the files. The default 6-5 directory is C:\AUDIODRV, and then press the [ENTER] key the installation is completed. Step 5: C:\AUDOS>ESS In the DOS mode execute the SETUP.EXE file.Step 4: .ZIP Step 3: Change directory to the new created directory, and extract the compress file. DOSDRV.ZIP PKUNZIP.EXE, in the new created directory.and the extract progra Step 2: Step 1: Make the new created directory to put the audio drivers. (4) DOS Driver Step 6: Finally, the installation is completed and user must reboot the system. button. Step 5: C:\AUNT40 path. Step 4: C:\AUNT40>PKUNZIP -d NT40DRV.ZIP C:\>CD AUNT40 Step 3: Change directory to the new created directory, and extract the compress file. C:\>COPY A:\UTILITY\PKUNZIP.EXE C:\AUNT40 C:\>COPY A:\AUNT40\NT40DRV.ZIP C:\AUNT40 , in the new created directory.PKUNZIP.EXE prograand the Step 2: C:\>MD AUNT40 Step 1: Make the new created directory to put the audio drivers. And then the following steps are for WINNT4.0: (3) WINNT Driver Step 6: Finally, the installation is completed and user must reboot the system. button. Step 5: C:\AUW95 path. Step 4: s GuideAR-B1564 User ¡¦ 6.3 The AR-B1564 is equipped with a programmable time-out period watchdog timer. This watchdog timer can be enabled by your program. Once you have enabled the watchdog timer, the program should trigger it every time up, it will generate a reset signal to reset the system. The time-out period can be programmed to be 3 to 42 6-1 6.3.1 Watchdog Timer Setting The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups. Whenever the watchdog timer is enabled, the LED will blink to indicate that the timer is counting. The watchdog Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it If you want to reset your system when watchdog times out, the following table listed the relation of timer factors 3 6 6-1 6-6 Time-Out SettingTable 4287H 3686H 3085H 2484H 1883H 1282H 81H 80H Time-Out Period (Seconds)Time Factor between time-out period. time-out period is between 1 to 7 timer factors. The factor of the watchdog timer time-out constant is approximately 6 seconds. The period for the watchdog timer signal to tell your program that the watchdog is times out. to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the system or trigger the IRQ15 times-out. After you trigger the watchdog timer, it will be set to zero and start to count again. If your program fails timer is automatically disabled after reset. Watchdog Block DiagramFigure seconds. before it times out. If your program fails to trigger or disable this timer before it times out because of system hang- This section describes how to use the Watchdog Timer, disabled, enabled, and trigger. WATCHDOG TIMER s GuideAR-B1564 User ¡¦ relation of timer factors between time-out period. And if you use the IRQ15 signal to warn your program when 3 6 6-2 1. If you program the watchdog to generate IRQ15 signal when it times out, you should initial IRQ15 2. Before you initial the interrupt vector of IRQ15 and enable the PIC, please enable the watchdog timer previously, otherwise the watchdog timer will generate an interrupt at the time watchdog timer is 6.3.2 Watchdog Timer Enabled 76H. The following is a BASICA program which demonstrates how to enable the watchdog timer and set the time- 6.3.3 Watchdog Timer Trigger at least once every time-out period to its previous setting. You can change the time-out period by writing another 6.3.4 Watchdog Timer Disabled ., etc. 6-7 CTOR%OUT WD_REG%, TIMER_FA3050 REM Output factor to watchdog register3040 TIMER_FACTOR% = 03030 REM Timer factor = 03020 WD_REG% = 76H3010 REM Points to command register3000 To disable the watchdog timer, simply write a 00H to the watchdog register. .,etc. OUT WD_REG%, TIMER_FACTOR%2050 REM Output factor to watchdog register2040 TIMER_FACTOR% = &H842030 REM Timer factor = 84H (or 0C4H)2020 WD_REG% = 76H2010 Points to command registerREM2000 in next trigger. Below is a BASICA program which demonstrates how to trigger the watchdog timer: timer factor to the watchdog register at any time, and you must trigger the watchdog before the new time-out period After you enable the watchdog timer, your program must write the same factor as enabling to the watchdog register .,etc. D_REG%, TIMER_FACTOR%OUT W1050 REM Output factor to watchdog register1040 TIMER_FACTOR% = %H841030 REM Timer factor = 84H (or 0C4H)1020 WD_REG% = 76H1010 REM Points to command register1000 out period at 24 seconds. To enable the watchdog timer, you have to output a byte of timer factor to the watchdog register whose address is enabled. this interrupt. An interrupt service routine is required too. interrupt vector and enable the second interrupt controller (8259 PIC) in order to enable CPU to process NOTE: Time-Out SettingTable 420C7H 360C6H 300C5H 240C4H 180C3H 120C2H 0C1H 0C0H Time-Out Period (Seconds)Time Factor Prefetch> these two items must set to PRIMARY. watchdog timer out, please enter the BIOS Setup the menu, the and to boot the operation system, this option will reduce the performance of the system. Acrosser recommends choosing the in the main menu. The option 7.2 STANDARD CMOS SETUP The option allows you to record some basic system hardware configuration and set the system clock and error handling. If the CPU board is already installed in a working system, you will not need to AMIBIOS SETUP - STANDARD CMOS SETUP (C) 1996 American Megatrends, Inc. All Rights Reserved Date (mm/dd/yyyy): Sun Jun 06,199964 Time (hh/mm/ss): 13:39:300MB Floppy Drive A: Not Installed Floppy Drive B: Not Installed LBA Blk 32Bit PIO Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode Pri Master : Auto On Off Auto Pri Slave : Auto On Off Auto Sec Master : Auto On Off Auto Sec Slave : Auto On Off Auto Boot Sector Virus Protection Disabled ¡ ô¡ õ 7-2 The user can bypass the date and time prompts by creating an AUTOEXEC.BAT file. For information on how to The BIOS supports various types for user settings, The BIOS supports , , and so the user can install up to two hard disks. For the master and slave jumpers, please refer to k’ during bootup. This will allow you to change your hard drives (with the power off) and then power on without 7-2 you must configure the hard disk drive in the standard method as described above by the option. having to reconfigure your hard drive type. If you use older hard disk drives which do not support this feature, then You can select under the and fields. This will enable auto detection of your IDE drives s installation descriptions and the hard disk jumper settings.the hard dis Hard Disk Setup using the left-or right-arrow key. To enter the configuration value for a particular drive, highlight its corresponding field and then select the drive type The option records the types of floppy disk drives installed in the system. Floppy Setup create this file, please refer to the MS-DOS manual. the hour, minute and second format. Highlight the field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow the month, day and year format. Highlight the field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow Date & Time Setup BIOS: Standard CMOS SetupFigure F2/F3:Color Year: 1901 - 2099 PgUp/PgDn:Modify Day: 01 - 31 :SelESC:Exit Month: Jan - Dec On On On On 0KB select this option anymore. 3. The BIOS settings are described in detail in this section. is best-case values that should optimize system performance. function, or you can contact the technical support engineer. 1. AR-B1564 BIOS the factory-default setting is used to the CAUTION: s GuideAR-B1564 User ¡¦ This option protects the boot sector and partition table of your hard disk against accidental modifications. Any allow the operation to continue or use a bootable virus-free floppy disk to reboot and investigate your system. The default setting is <. This setting is recommended because it conflicts with new operating systems. 7.3 ADVANCED CMOS SETUP The option consists of configuration entries that allow you to improve your system performance, or let you set up some system features according to your preference. Some entries here are d’ AMIBIOS SETUP - ADVANCED CMOS SETUP (C) 1998 American Megatrends, Inc. All Rights Reserved 1st Boot Device Available Options : 2nd Boot Device Disabled 3rd Boot DeviceCDROM 4th Boot Device Disabled Boot From Card BIOS Try Other Boot Devices S.M.A.R.T. for Hard DisksDisabled Quick BootDisabled ARMD-FDD BootUp Num-Lock ARMD-HDD Floppy Drive SwapDisabled CDROM Floppy Drive Seek Disabled Floppy Access Control NETWORK HDD Access Control PS/2 Mouse Support Typematic Rate System KeyboardPresent VGA/EGA Password Check Boot to OS/2, DRAM 64MB or Above W¡¥ ¡¦ ¡¥ ¡¦ Message Display Internal Cache WriteBack External CacheWriteThru System BIOS Cacheable C000, 16k Shadow C400, 16k Shadow C800, 16k ShadowDisabled CC00, 16k ShadowDisabled D000, 16k ShadowDisabled ¡ ô¡ õ D400, 16k ShadowDisabled D800, 16k ShadowDisabled DC00, 16k ShadowDisabled 7-3 This category speeds up Power On Self Test (POST) after you power on the computer. If it is set to , This item is used to activate the Num-Lock function upon system boot. If the setting is on, after a boot, the Num- 7-3 Lock light is lit, and user can use the number key. BootUp Num-Lock BIOS will shorten or skip some check items during POST. Enabled Quick Boot These options determine where the system looks first for an operating system. 4th Boot Device 3rd Boot Device 2nd Boot Device 1st Boot Device BIOS: Advanced CMOS SetupFigure F2/F3:Color PgUp/PgDn:Modify :Sel ESC:Exit Enabled Enabled Enabled EnabledDELHit Enabled If ErrorF1ait For No Setup Primary Display Fast Enabled Normal Normal SCSI On Floppy IDE-3 Yes IDE-2 Yes IDE-1 IDE-0 Floppy IDE-0 s design to remain in their default settings.required by the CPU boar Installation of new operating system requires that you disable this to prevent write errors. Disabled> attempt to write to them will cause the system to halt and display a warning message. If this occurs, you can either Virus Protection s GuideAR-B1564 User ¡¦ The option reverses the drive letter assignments of your floppy disk drives in the Swap A, B setting, otherwise leave on the setting of (No Swap). This works separately from the BIOS Features floppy disk swap feature. It is functionally the same as physically interchanging the connectors of the floppy disk drives. When <>, the BIOS swapped floppy drive assignments so that Drive A becomes Drive B, and Drive B becomes The setting of allows the system to detect a PS/2 mouse on bootup. If detected, IRQ12 will be used for the PS/2 mouse. IRQ 12 will be reserved for expansion cards if a PS/2 mouse is not detected. will This option enables password checking every time the computer is powered on or every time the BIOS Setup is is When using the OS/2 operating system with installed DRAM of greater than 64MB, you need to this . ‘1F’ Press to continue Hit ‘’ Hit ‘DEL’ if you want to run setup 7-4 It will prevent the message from appearing on the first BIOS screen when the computer boots. to prevent the message as follows:DisabledSet this option to Message DisplayDEL , the AMIBIOS does not wait for you to press the key after an error message.DisabledIf this option is set to AMIBIOS POST error messages are followed by: If ErrorWait for Disabledoption otherwise leave this on the setup default of Enabled Boot to OS/2, DRAM 64MB or Above chosen, the password prompt appears if the BIOS executed. Setup is chosen, a user password prompt appears every time the computer is turned on. If Alwaysexecuted. If Password Check The option is used to set the type of video display card installed in the system. Primary Display This function specifies that a keyboard is attached to the computer. System Keyboard This item specifies the speed at which a keyboard keystroke is repeated. Typematic Rate reserve IRQ12 for expansion cards and therefore the PS/2 mouse will not function. Disabled Enabled PS/2 Mouse Support , the BIOS will seek the floppy drive one time upon bootup.EnabledIf the item is setting Floppy Drive Seek Drive A under DOS. Enabled Disabled Floppy Drive Swap s GuideAR-B1564 User ¡¦ Neither L1 internal cache memory on the CPU or L2 7-1 7-2 When this option is set to , the contents of the F0000h system memory segment can be read from or . The video ROM is not copied to RAM. The contents of the video ROM cannot be read from or written to cache The contents of the named ROM area are written to the same address in system memory (RAM) for faster execution, if an adapter ROM will be using the named ROM area. Also, the contents of the RAM area can be 7-3 7-5 Shadow SettingTable read from and written to cache memory. Cached address in system memory (RAM) for faster execution. Enabled The contents of C000h - C7FFFh are written to the same memory. Disabled DESCRIPTIONSETTING If no adapter ROM is using the named ROM area, this area is made available to the local bus. The settings are: These options control the location of the contents of the 32KB of ROM beginning at the specified memory location. Shadow Disabledis . The Enabled. The is Disabled or EnabledThe settings are BIOS ROM to system RAM for faster execution. written to L2 secondary cache memory. The contents of the F0000h memory segment are always copied from the Enabled System BIOS Cacheable External Cache SettingTable Use the write-through caching algorithm.WriteThru Use the write-back caching algorithm.WriteBack secondary cache memory is enabled. Neither L1 internal cache memory on the CPU or L2Disabled DescriptionSetting This option specifies the caching algorithm used for L2 secondary (external) cache memory. The settings are: External Cache Internal Cache SettingTable WriteThru Use the write-through caching algorithm. WriteBack Use the write-back caching algorithm. secondary cache memory is enabled. Disabled DescriptionSetting This option specifies the caching algorithm used for L1 internal cache memory. The settings are: Internal Cache s GuideAR-B1564 User ¡¦ 7.4 ADVANCED CHIPSET SETUP This option controls the configuration of the board’s chipset. Control keys for this screen are the same as for the AMIBIOS SETUP - ADVANCED CHIPSET SETUP (C) 1998 American Megatrends, Inc. All Rights Reserved DRAM Automatic Configuration Available Options : EDO Dram Access Time60ns Disabled FP Dram Access Time60ns Refresh Cycle Time RAS Pulse Width When Refresh 6T DRAM Read Leadoff Time 1T ISA Bus Clock Frequency7.159MHZ MEMORY HOLE at 15M - 16M Disabled USB Function ¡ ô¡ õ 7-4 If selecting a certain setting for one BIOS Setup option determines the assigns the dependent settings and does not permit the end user to modify these These options are used to <> the USB function. If the options set in the same time will open 7-6 This option sets the DRAM refresh cycle time. Refresh Cycle Time 2. Acrosser recommends user setting at the range of 8MHz to 10MHz. 1. PCLK means the CPU inputs clock.NOTE: This option sets the polling clock speed of ISA Bus (PC/104). ISA Bus Clock Frequency the , and will occupied IRQ10. Disabled USB Keyboard/Mouse Legacy Support USB Function This option is used to select the ISA bus clock rate. ISA Bus Clock Frequency This option specifies the range 15MB to 16MB in memory that cannot be addressed on the ISA bus. Memory Hole at 15-16 MB settings unless the setting for the parent option is changed. Invalid options are grayed and cannot be selected. options, the BIOS automatically settings for one or more other BIOS Setup DRAM Automatic Configuration BIOS: Advanced Chipset SetupFigure F2/F3:Color PgUp/PgDn:Modify EnabledUSB Keyboard / Mouse Legacy Support :Sel ESC:Exit Enabled 12 Enabled Enabled previous screen. s GuideAR-B1564 User ¡¦ 7.5 POWER MANAGEMENT This section is used to configure Power management setup for configuring power management features. This option allows you to reduce power consumption. This feature turns off the video AMIBIOS SETUP - Power Management Setup (C) 1998 American Megatrends, Inc. All Rights Reserved Power Management /APM Disabled Available Options : Video Power Down ModeDisabled Disabled Hard Disk Power Down ModeDisabled Hard Disk Time Out(Minute)Disabled Standby Time Out (Minute)Disabled Suspend Time Out (Minute)Disabled Slow Clock Ratio IRQ 3 – (COM2, COM4) IRQ 4 – (COM1, COM3) IRQ 5 – (LPT 2) IRQ 7 – (LPT 1) IRQ 10 IRQ 11 IRQ 12 (PS2 Mouse) ¡ ô¡ õ IRQ 13 (Math Coprocessor) IRQ 14 IRQ 15 7-5 This option specifies the power management state that the video subsystem enters after the specified period of This option specifies the power management states that the hard disk drive enters after the specified period of This option specifies the length of a period of hard disk inactivity. When this period expired, the hard disk drive These options specify the length of the period of system inactivity when the computer is already in Standby mode This option specifies the speed at which the system clock runs in power saving modes. The settings are IRQ These options enable event monitoring. When the computer is in a power saving mode, activity on the named 7-7 interrupt request line is monitored by BIOS. When any activity occurs, the computer enters Full On mode. expressed as a ratio between the normal clock speed and the power down clock speed. Slow Clock Ratio before the computer is placed on Suspend mode. In Suspend mode, nearly all power use is curtailed. Suspend Time Out Standby Time Out enters the power-conserving mode specified on the option. Hard Disk Time Out display inactivity has expired. Hard Disk Power Down Mode display inactivity has expired. Video Power Down Mode this option is to enable the power management and APM (Advanced Power Management) features.Enabled Power Management /APM BIOS: Power Management SetupFigure F2/F3:Color Monitor PgUp/PgDn:ModifyMonitor Ignore :Sel ESC:Exit Monitor Ignore Ignore IgnoreIRQ 9 Monitor Ignore Monitor Monitor 1:4 Enabled display and shuts down the hard disk after a period of inactivity. s GuideAR-B1564 User ¡¦ 7.6 AMIBIOS SETUP - PCI/PLUG AND PLAY SETUP (C) 1998 American Megatrends, Inc. All Rights Reserved Plug and Play Aware O/S Available Options : Clear NVRAM PCI Latency Timer (PCI Clocks) PCI IDE BusMasterDisabled PCI Slot1 IRQ Priority PCI Slot2 IRQ Priority PCI Slot3 IRQ Priority PCI Slot4 IRQ Priority DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6 DMA Channel 7 PCI /PnP PCI /PnP PCI /PnP PCI /PnP PCI /PnP IRQ 10PCI /P IRQ 11PCI /PnP IRQ 12PCI /PnP IRQ 14PCI /PnP ¡ ô¡ õ IRQ 15PCI /PnP Reserved Memory SizeDisabled Reserved Memory AddressC800 7-6 Set this option to if the operating system installed in the computer is Plug and Play-aware. The BIOS only detects and enables all other PnP-aware adapter cards. Windows 95 is PnP-aware. Set this option <> if the operating system (such as DOS, OS/2, Windows 3.x) does not use PnP. You must set this option correctly or This sets the operating mode of the boot block area of the BIOS FLASH ROM to allow programming in the These options specify the bus that the named IRQs/DMAs lines are used on. These options allow you to specify IRQs/DMAs for use by legacy ISA adapter cards. These options determine if the BIOS should remove an IRQ/DMA from the pool of available IRQs/DMAs passed to BIOS configurable devices. If more IRQs/DMAs must be removed from the pool, the end user can use these PCI/PnP Setup options to remove the IRQ/DMA by 7-8 This option specifies the size of the memory area reserved for legacy ISA adapter cards. Reserved memory Size assigning the option to the ISA/EISA setting. Onboard I/O is configurable by BIOS. DMA & IRQ this option is to specify that the IDE controller on the PCI local bus has bus mastering capability.Enabled PCI IDE BusMaster This option sets latency of all PCI devices on the PCI bus. The settings are in units equal to PCI clocks. PCI Latency Timer (PCI Clocks) setting. Yes Clear NVRAM PnP-aware adapter cards installed in your computer will not be configured properly. No detects and enables PnP ISA adapter cards that are required for system boot. The Windows 95 operating system Yes Plug and Play Aware O/S BIOS: PCI /Plug and Play SetupFigure F2/F3:Color PgUp/PgDn:Modify :Sel ESC:Exit nP IRQ 9 IRQ 7 IRQ 5 IRQ 4 IRQ 3 PnP PnP PnP PnP PnP PnP Auto Auto Auto Auto No 64 Yes No No bus slots. All PCI bus slots on the system use INTA#, thus all installed PCI cards must be set to this value. This section is used to configure PCI / Plug and Play features. The option configures the PCI PCI/PLUG AND PLAY s GuideAR-B1564 User ¡¦ This option specifies the beginning address (in hex) of the reserved memory area. The specified ROM memory 7.7 PERIPHERAL SETUP AMIBIOS SETUP - PERIPHERAL SETUP (C) 1998 American Megatrends, Inc. All Rights Reserved OnBoard FDC Available Options : OnBoard Serial Port1A OnBoard Serial Port2 Disabled OnBoard Serial Port3 OnBoard Serial Port4 Serial Port4 ModeStandard IR Output MUXIRRX2/IRTX2 IR Transmission Mode Receiver Polarity Transmitter Polarity OnBoard Parallel Port Parallel Port Mode EPP Version Parallel Port IRQ Parallel Port DMA Channel OnBoard PCI IDEBoth Primary Master Prefetch Primary Slave Prefetch ¡ ô¡ õ Secondary Master Prefetch Secondary Slave Prefetch 7-7 This option specifies the parallel port mode. ECP and EPP are both bidirectional data transfer schemes that 7-9 This option specifies the onboard IDE controller channels that will be used. OnBoard PCI MASTER/SLAVE Prefetch This option is only available if the setting for the parallel Port Mode option is ECP. Parallel Port DMA Channel adhere to the IEEE 284 specifications. Parallel Port Mode This option enables the parallel port on the AR-B1564. OnBoard Parallel Port This option enables the serial port on the AR-B1564. OnBoard Serial Port This option enables the floppy drive controller on the AR-B1564. OnBoard FDC BIOS: Peripheral SetupFigure F2/F3:Color Enabled PgUp/PgDn:Modify Enabled :Sel ESC:Exit Enabled Enabled N/A Auto N/A Normal Auto N/A N/A Full Duplex Auto Enabled Auto Auto Auto uto Auto This section is used to configure peripheral features. area is reserved for use by legacy ISA adapter cards. Reserved memory Address s GuideAR-B1564 User ¡¦ 7.8 This option detects the parameters of an IDE hard disk drive, and automatically enters them into the Standard 7.9 PASSWORD SETTING This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor 7.9.1 Setting Password Enter the password and press [Enter]. The screen does not display the characters entered. After the new press [Esc] to return to the BIOS Main Menu. The password is stored in CMOS RAM after BIOS completes. The Enter new supervisor password: 7.9.2 Password Checking The password check option is enabled in Advanced Setup by choosing either (the password prompt appears every time the system is powered on) or (the password prompt appears only when BIOS is run). The password is stored in CMOS RAM. User can enter a password by typing on the keyboard. As user select Supervisor or User. The BIOS prompts for a password, user must set the Supervisor password before user can set the User password. Enter 1-6 character as password. The password does not appear on the screen when 7.10 LOAD DEFAULT SETTING to quickly set system configuration parameters, you can choose a group of settings that have a better chance of 7.10.1 Auto Configuration with Optimal Setting User can load the optimal default settings for the BIOS. The Optimal default settings are best-case values that Load high performance settings (Y/N) ? 7.10.2 Auto Configuration with Fail Safe Setting User can load the Fail-Safe BIOS Setup option settings by selecting the Fail-Safe item from the Default section of The Fail-Safe settings provide far from optimal system performance, but are the most stable settings. Use this Load failsafe settings (Y/N) ? 7-10 option as a diagnostic aid if the system is behaving erratically. the BIOS Setup main menu. should optimize system performance. If CMOS RAM is corrupted, the optimal settings are loaded automatically. working when the system is having configuration related problems. In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items typed. Make sure you write it down. Setup Always next time the system boots, you are prompted for the password function is present and is enabled. If the password confirmation is incorrect, an error message appears. If the new password is entered without error, password is entered, retype the new password as prompted and press [Enter]. Select the appropriate password icon (Supervisor or User) from the Security section of the BIOS Setup main menu. password or a User password. CMOS Setup screen. AUTO-DETECT HARD DISKS s GuideAR-B1564 User ¡¦ 7.11 BIOS EXIT This section is used to exit the BIOS main menu in two types situation. After making your changes, you can either 7.11.1 Save Settings and Exit Save current settings and exit (Y/N) ? 7.11.2 Exit Without Saving When you select this option, the following message will appear at the center of the screen to help to Abandon all Quit without saving (Y/N) ? 7.12 BIOS UPDATE system board. The chips can be electronically reprogrammed, allowing you to upgrade your BIOS firmware The AR-B1564 provides FLASH BIOS update function for you to easily upgrade newer BIOS version. Please Turn on your system and don’t detect the CONFIG.SYS and AUTOEXEC.BAT files. Enter the BIOS File name from which Flash EPROM will be programmed. The File name must and And then please enter the file name to the box of . And the box of Flash EPROM Programming is going to start. System will not be usable until Programming of Flash EPROM is successfully complete. In case of any error, existing Flash EPROM must be replaced by And then the box will show the , and the gray statement 7-11 The BIOS update is successful, the message will show .Step 7: shows . As the gray statement, press the key to updating the new BIOS.Step 6: new program Flash EPROM. will show the notice as follow. In the bottom of this window always show the gray statement. Step 5: with a or press to exit. The screen will show the message as follow:Step 4: A:\>FLASH634 In the MS-DOS mode, you can type the FLASH634 program.Step 3: Insert the FLASH BIOS diskette into the floppy disk drive.Step 2: file. importance is that the system has to load the HIMEM.SYS on the memory in the CONFIG.SYS TheStep 1: follow the operating steps for updating new BIOS: without removing and installing chips. The BIOS program instructions are contained within computer chips called FLASH ROMs that are located on your Data and Exit Setup. to CMOS and Exit the Setup. As you select this function, the following message will appear at the center of the screen to assist you to save data the CMOS. password (if it has been changed) will be stored in the CMOS. The CMOS checksum is calculated and written into This item set in the , , and the new save them or exit the BIOS menu and without saving the new values. s GuideAR-B1564 User ¡¦ 1. After turn on the computer and the system didn’t detect the boot procedure, please press the [F5] key immediately. The system will pass the CONFIG.SYS and AUTOEXEC.BAT files. The importance is 2. The BIOS Flash disk is not the standard accessory. Now the onboard BIOS is the newest BIOS, if user needs adding some functions in the future please contact technical supporting engineers, they will . 7-12 FLASH634.EXE had to Version 6.343. The file of provide the newest BIOS for updating. that the system has to load the HIMEM.SYS on the memory in the CONFIG.SYS file. NOTE: s GuideAR-B1564 User ¡¦ 8. ”” ””) 8-1 X8.00146 mmX203mm (5.75Dimensions: 8 layers, EMI consideredPC Board: Add EMI components to COM ports, Parallel port, CRT, Keyboard and PS/2 mouseCE Design-In: +5V and +12V, 4A maximum (base on Pentium-75)Power Req.: 8 TTL level loads maximum (PC/104)BUS Drive Cap.: Power LED and watchdog LEDIndicator: Supports 4 TTL inputs and 4 TTL outputsTTL I/Os: Build-in 16bit PnP sound blaster with DOS and Windows driversSound System: Build-in one DiskOnChip socket supports from 2MB to 72MB Flash diskFlash Disk: On-board buzzer and external speakerSpeaker: BQ3287MT or compatible chipsReal Time Clock: AMI Flash BIOS (256KB, including VGA BIOS)BIOS: Built-in 2 port USB interfaceUSB: 100M/10Mbps Ethernet with 7-pin JST connector for 100BASE2Network: PC/AT compatible keyboard and PS/2 mouse interfaceKeyboard: 1 RS-232C, 1 RS-232C/422/485, and 1 RS-232C/TTL, 1 RS-232/IrDASerial Port: 1 bi-directional centronics type parallel portParallel Port: floppy disk drives or 3.5Supports two 5.25FDC: Supports two IDE type hard disk drivesHDC: 2 MB RAM (PCI bus, 1024X768/64K colors)VGA/LCD Display: Software programmable, 3 to 42 seconds time intervalWatchdog: 512KB synchronous pipeline burst SRAMCache Size: Supports FPM/EDO RAM, 128 MB maximum (Two 72-pin SIMMs w/o DRAM)RAM Memory: 1 PCI and Non-stack through PC/104 busBus Interface: SiS 5582 and C&T F65550Chipset: Supports 75 to 333 Mhz CPU (Socket 7 w/o CPU)CPU: SPECIFICATIONS s GuideAR-B1564 User 1121814125612121131291126 ¡¦ 9. PL 9.1 PLACEMENT 9-1 ACEMENET & DIMENSIONS s GuideAR-B1564 User 522526444310M3M5M6J4CN1CN2CN9U11CN12J1U10BUS1JP3J14JP8JP2 ¡¦ 9.2 9-2 Unit: mil (1 inch = 25.4 mm = 1000 mil) DIMENSIONS s GuideAR-B1564 User ¡¦ 10.1 PROGRAMMING RS-485 The majority communicative operation of the RS-485 is in the same of the RS-232. When the RS-485 proceeds Please refer to the section of the “” in the chapter “” for the detail description of t’ Initialize COM port in the receiver interrupt mode, and /or transmitter interrupt mode. (All of the “0”. d’’ “1”. Wait for the buffer’s data empty. Check transmitter holding register (THRE, bit 5 of the address of offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be “0”. “0” – “1”. Wait for the buffer’s data empty. Check transmitter holding register (THRE, bit 5 of the address of offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be “0”. “0” 5’2’ 10-1 s.s operation of receiving data is in the same of the RS-23The RS-48 (4) Receive data Disabled TXC signal, and the bit 0 of the address of offset+4 sets Step 4: Step 3: Send out the data. (Write all data to the offset+0 of the current COM port address)Step 2: Enable TXC signal, and the bit 0 of the address of offset+4 just sets Step 1: the data more than two characters)(3) Send out one block data (Transmit Disabled TXC signal, and the bit 0 of the address of offset+4 sets Step 4: Step 3: Send out the data. (Write this character to the offset+0 of the current COM port address)Step 2: Enable TXC signal, and the bit 0 of the address of offset+4 just sets Step 1: (2) Send out one character (Transmit) s TXC communication.s DTR signal to the RS-485Control the AR-B1564 CPU carNOTE: Disable TXC (transmitter control), the bit 0 of the address of offset+4 just sets Step 2: protocol buses of the RS-485 are in the same.)communication Step 1: (1) Initialize COM port s register.the COM por System ControlSerial PortNOTE: Disable TXCStep 4: Waiting for data emptyStep 3: Send out dataStep 2: Enable TXCStep 1: the transmission which needs control the TXC signal, and the installing steps are as follows: PROGRAMMING RS-485 & INDEX10. s GuideAR-B1564 User ¡¦ “” ” 10-2 RETURN80 INPSTR$=INPUT$(1,#1)70 m COM1: bufferREM Read one character fro60 RETURN50 INPSTR$40 REM Receiver buffer is empty30 IF LOF(1)<256 THEN 7020 REM Check COM1: receiver buffer10 c.) Receive one character from COM1 RETURN90 OUT &H3FC, (INP(&H3FC) AND &HEF)80 ransmitter by resetting DTRREM Disable t70 IF ((INP(&H3FD) AND &H60) >0) THEN 6060 REM Check transmitter holding register and shift register50 PRINT #1, OUTCHR$40 REM Send out one character30 OUT &H3FC, (INP(&H3FC) OR &H01)20 REM Enable transmitter by setting DTR ON10 b.) Send out one character to COM1 RETURN40 OUT &H3FC, (INP(%H3FC) AND &HFA)30 REM Reset DTR20 AS #1 LEN=1COM1:9600,m,8,1OPEN 10 a.) Initial 86C450 UART (5) Basic Language Example s GuideAR-B1564 User ¡¦ 10.2 3-6 3-7 3-8 3-7 3-8 3-9 4-3 4-1 3-5 3-4 3-8 5-1 4-4 3-6 External power LED & keyboard lock 5-2 5-2 4-3 3-2 3-2 4-3 3-3 3-3 3-4 10-3 3-12CPU logic core voltage selectSW3 3-19D.O.C. memory address select RS-485 mode select COM-B RS-232/RS-422 select COM-A RS-232/TTL selectSW2 3-12System base clock & CPU clock multiplierSW1 LCD supported voltage selectJP8 3-17PS/2 mouse IRQ12 settingJP7 Terminal select COM-A RS-485/RS-422 adapter selectJP4 DE/E signal from M or LP selectJP3 3-13P54C/P55C CPU type selectJP2 Watchdog LEDD3 Power LEDD1 D.O.C. socketU28 3-16DRAM socketsSIMM1~SIMM2 3-20120-pin PCI connectorBUS1 3-152-pin CPU cooling fan power connectorJ14 3-18Reset headerJ13 Network 100Mbps transferring LED headerJ12 3-16HDD LED headerJ11 Network active LED headerJ10 3-16Watchdog LED headerJ9 header 3-16J8 3-17PS/2 mouse connectorJ7 3-17Keyboard connectorJ6 IrDA headerJ5 3-18External speaker headerJ4 Touch screen connectorJ3 Ethernet connectorJ2 8-pin power connectorJ1 TTL I/O connectorCN15 TTL & RS-485/RS-422 connectorCN14 CRT connectorCN13 LCD panel display connectorCN12 3-1040-pin PC/104 connector bus C & DCN11 3-1064-pin PC/104 connector bus A & BCN10 3-1926-pin audio connectorCN9 Parallel port connectorCN8 FDD port connectorCN7 44-pin hard disk (IDE) connectorCN6 4-pin power connectorCN5 40-pin hard disk (IDE) connectorCN4 RS-232C connectorCN3 3-18USB connectorCN2 3-154-pin CPU cooling fan power connectorCN1 PageFunctionName INDEX s GuideAR-B1564 User